Transcript Arithmetic Network di VLSI Pertemuan 12 Matakuliah H0362/Very Large Scale Integrated Circuits

Matakuliah
Tahun
Versi
: H0362/Very Large Scale Integrated Circuits
: 2005
: versi/01
Pertemuan 12
Arithmetic Network di VLSI
1
Learning Outcomes
Pada Akhir pertemuan ini,
diharapkan mahasiswa akan dapat
menerapkan gerbang logik,
switching logik, dan atau struktur
deskripsi Verilog untuk membangun
rangkaian arithmetic sederhana
dalam CMOS VLSI.
2
Bit Adder
0
0
1
1
+
+
+
+
0
1
0
1
=
=
=
=
0
1
1
10
operasi adder
x
0
0
1
1
y
0
1
0
1
s
0
1
1
0
c
0
0
0
1
x
half adder
y
HA
s
c
simbol
x
s
y
c
rangkaian
Verilog HDL:
module half_adder_gate (sum, c_out, x, y) ;
input x, y ;
output sum, c_out ;
and (c_out, x, y) ;
xor (sum, x, y) ;
endmodule
3
Bit Adder
a + b:
a = a 3 a2 a1 a0
a3 a2 a1 a0
b = b3b2b1b0
+
c4 s3s2s1s0
ai
ci+1
bi
FA
(+)
si
+
ci
ai
bi
ci+1
si
b3 b2 b1 b0
ci
ai bi ci
si
ci+1
0
0
1
1
0
0
1
1
0
1
1
0
1
0
0
1
0
0
0
1
0
1
1
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
si = ai  bi  ci
ci+1 = ai . bi + ci . (ai  bi)
4
a i bi
Bit Adder
ai bi
ci+1
ci
ci+1
HA
ci
HA
si
rangkaian
si
Verilog HDL:
module full_adder_HA (sum, c_out, a, b, c_in) ;
input a, b, c_in ;
output sum, c_out ;
wire wa, wb, wc ;
half_adder_gate (wa, wb, a, b) ;
half_adder_gate (sum, wc, wa, c_in) ;
or (c_out, wb, wc) ;
endmodule
5
Ripple Carry Adder
a
b
n
n
Adder
cn
4-bit ripple carry adder circuit
a 3 b3
n
a 2 b2
a 1 b1
a 0 b0
s
+
c4
s3
c3
+
s2
c2
+
s1
c1
+
c0
s0
Verilog HDL:
module four_bit_adder (sum, c_4, a, b, c_0) ;
input [3:0] a, b ;
input c_0 ;
output [3:0] sum ;
output c_4 ;
assign {c_4, sum} = a + b + c_0 ;
endmodule
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Carry Look Ahead Adder
ai
Ci+1
bi
gi = 1
ci
pi = 1
gi
ai . bi
si
ai = b i = 0
ai = b i = 1
ai  bi
Basic Carry Look Ahead Algorithm
0
1
0
pi
ai  bi
0
0
1
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Multiplier
Dasar operasi:
0x0=0
0x1=0
1x0=0
1x1=1
Perkalian dilakuan dengan cara menuliskan kembali bilangan yang
dikali jika bit bilangan pengalinya “1”, dengan penulisan LSB dari
bilangan yang dikali ditulis dibawah bit “1” pengali bersangkutan.
Kemudian hasil perkalian adalah penjumlahan penulisan kembali
bilangan yang dikali tersebut.
Contoh:
11011
100
11011
11011
10000111
x
+
27
5
135
x
8
Multiplier
Product register (2n)
multiplicand
0
n
n

shr
multiplier
n
MUX
n
n-bit adder
n
Register-based multiplier network
9
Array Multiplier
a3
a2 a1
a0
P7
P6
P5
P4
P3
P2
P1
P0
b0
b1
b2
Multiplier
Array
b3
p7
a3 b 0
a2 b 0
a1 b 0
a3 b 1
a2 b 1
a1 b 1
a0 b 1
a3 b 2
a2 b 2
a1 b 2
a0 b 2
a3 b 3
a2 b 3
a1 b 3
a0 b 3
p6
p5
p4
p3
p2
p1
a0 b 0
p0
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RESUME
•
•
•
•
Bit Adder: Half Adder, Full Adder.
Ripple Carry Adder.
Carry Look ahead adder.
Multiplier
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