Transcript Electronic Materials Conference (EMC), 6-25-2009 Improved Migration-Enhanced Epitaxy for Self-Aligned InGaAs Devices Mark A.

Electronic Materials Conference (EMC), 6-25-2009
Improved Migration-Enhanced
Epitaxy for Self-Aligned InGaAs
Devices
Mark A. Wistey
University of California, Santa Barbara
Now at University of Notre Dame
[email protected]
U. Singisetti, G. Burek, A. Baraskar,
V. Jain, B. Thibault, A. Nelson,
E. Arkun, C. Palmstrøm, J. Cagnon, S.
Stemmer, A. Gossard, M. Rodwell
University of California Santa Barbara
[email protected]
P. McIntyre, B. Shin, E. Kim
Stanford University
S. Bank
University of Texas Austin
Y.-J. Lee
Intel
Funding: SRC
Outline: Channels for Future CMOS
•Motivation for Self-Aligned Regrowth
•Facets, Gaps, Arsenic Flux and MEE
•Si doping and MEE
•Scalable III-V MOSFETs
•The Shape of Things to Come
Wistey, EMC 2009
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Motivation for Self-Aligned Regrowth
Blanket layers
AlGaAs
GaAs
InGaAs
GaAs
AlGaAs
GaAs
• 3D nanofabrication
?
Air gap VCSEL,
Dave Buell thesis
Qi Xinag, ECS 2004, AMD
Buried het laser,
C-W Hu JECS 2007
• Integration: III-V’s on Si
• Heteroepitaxy
• Selective area growth
• And III-V MOSFETs...
Wistey, EMC 2009
• Device properties
–Heat transfer
–Contacts
–Current blocking
W.K. Liu et al., J. Crystal Growth v. 311, p. 1979 (2009)
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Motivation for Regrowth: Scalable III-V FETs
Classic III-V FET (details vary):
{
Source
Large Area Contacts
Gap
Drain
Gate
Large Rc
Top Barrier or Oxide
• Disadvantages
of III-V’s
Channel
Bottom Barrier
InAlAs Barrier
{
• Advantages
of III-V’s
Implant: straggle,
short channel effects
Low
doping
III-V FET with Self-Aligned Regrowth:
High Velocity Channel
Small Raccess
Small Rc
High mobility
access regions
High doping: 1013 cm-2
avoids source exhaustion
Wistey, EMC 2009
Self-aligned
Gate
High-k
n+ Regrowth
High barrier
Channel
In(Ga)P Etch Stop
Bottom Barrier
2D injection avoids
source starvation
5nm
} Ultrathin
doping layer
Dopants active as-grown
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Process Flow Prior to Regrowth
Pattern gate metal
Selective dry etches
SiNx or SiO2 sidewalls
Encapsulate gate metals
Controlled recess etch (optional)
Slow facet planes
Not needed for depletion-mode FETs
Fabrication details:
U. Singisetti, PSSC 2009
Rodwell IPRM 2008
SiO2,
SiNx
Metals
high-k
Channel
Surface clean
UV ozone,
1:10 HCl:water dip & rinse,
UHV deox (hydrogen or thermal)
In(Ga)P etch stop
InAlAs barrier
InP substrate
Regrowth
Wistey, EMC 2009
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MBE Regrowth: Bad at any Temperature?
200nm Gap
• Low growth temperature (<400°C):
–Smooth in far field
–Gap near gate (“shadowing”)
–No contact to channel (bad)
Gate
Source-Drain
Regrowth
SiO2
Metals
high-k
Channel
• High growth temperature (>490°C):
– Selective/preferential epi on InGaAs
– No gaps near gate
– Rough far field
– High resistance
Wistey, EMC 2009
Gate
Source-Drain
Regrowth
Regrowth: 50nm InGaAs:Si, 5nm InAs:Si.
Si=8E19/cm3, 20nm Mo, V/III=35, 0.5 µm/hr.
SEMs: Uttam Singisetti
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Gap-free Regrowth by MEE
Migration-Enhanced Epitaxy (MEE) conditions: Wistey, MBE 2008
490-560°C (pyrometer)
As flux constant ~ 1x10-6 Torr: V/III~3, not interrupted.
0.5nm InGaAs:Si pulses (3.7 sec), 10-15 sec As soak
RHEED: 4x2 ==> 1x2 or 2x4 ==> 4x2 with each pulse.
SEM Side View
SEM Cross Section
Top of gate:
amorphous
InGaAs
SiO2 dummy
gate
SiO2 dummy gate
InGaAs Regrowth
InGaAs Regrowth
Original Interface
SEM: Greg Burek
• Smaller gapCrosshatching—relaxation?
• High Si activation (4x1019 cm-3).
Wistey, EMC 2009
SEM: Uttam Singisetti
•Quasi-selective growth
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High Temperature MEE: Smooth & No Gaps
460C
490C
Gap
540C
560C
Smooth
regrowth
SiO2 dummy
gate
SiO2 dummy
gate
In=9.7E-8, Ga=5.1E-8 Torr
Wistey, EMC 2009
No gaps, but
faceting next
to gates
Note faceting: surface kinetics, not shadowing.
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Shadowing and Facet Competition
SiO2
Shen & Nishinaga, JCG 1995
Fast surface
diffusion =
slow facet
growth
Slow diffusion =
rapid facet growth
SiO2
[100]
Slow
diffusion =
fast growth
Fast surface
diffusion =
slow facet growth
[100]
• Shen JCG 1995 says:
Increased As favors [111] growth
Good fill next to gate.
Wistey EMC 2009
• But gap persists
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Gate Changes Local Kinetics
1. Excess In & Ga
don’t stick to SiO2
2. Local
enrichment
of III/V ratio
4. Low-angle planes grow
instead
SiO2
[100]
3. Increased
surface mobility
• Diffusion of Group III’s away from gate
• Solution: Override local enrichment of Group III’s
Wistey EMC 2009
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Control of Facets by Arsenic Flux
SEM of single-wafer growth series varying As flux
• InGaAs Experiment:
• Vary As flux
• InAlAs marker layers
• Find best fill near
gate
InAlAs
markers
Increasing
InGaAs As flux
SiO2
Cr
W
5x10-6
2x10-6
1x10-6
0.5x10-6
• Lowest arsenic flux → “rising tide fill”
• No gaps near gate or SiO2/SiNx
• Tunable facet competition
Wistey, EMC 2009
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SiNx
Scalable InGaAs MOSFETs
300 nm SiO2 Cap
50 nm Cr
50 nm W
Mo
Mo
5 nm Al2O3
++
n regrowth InGaAs Channel, NID n++ regrowth
3 nm InGaP Etch Stop, NID
10 nm InAlAs Setback, NID
5 nm InAlAs, Si=8x1019 cm-3
200 nm InAlAs buffer
Semi-insulating InP Substrate
Top view SEM
Wistey, EMC 2009
Oblique
view
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SiNx
Scalable InGaAs MOSFETs
300 nm SiO2 Cap
50 nm Cr
50 nm W
Mo
Mo
5 nm Al2O3
++
n regrowth InGaAs Channel, NID n++ regrowth
3 nm InGaP Etch Stop, NID
10 nm InAlAs Setback, NID
5 nm InAlAs, Si=8x1019 cm-3
200 nm InAlAs buffer
Semi-insulating InP Substrate
Wistey, EMC 2009
• Conservative doping design:
• [Si] = 4x1013 cm-2
• Bulk n = 1x1013 cm-2 >> Dit
• Large setback + high doping
= Can’t turn off
• High Rsource > 350 Ω-µm
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Silicon Doping in MEE
Shutter Pattern
(Arsenic always open)
Technique
Si
Conventional MBE
[Si]
(cm-3)
n
(cm-3)
µ
(cm2V-1s-1)
8x1019
4.8x1019
847
8x1019
4.3x1019
1258
8x1019
4.2x1019
1295
16x1019
--
--
Ga
Si during Group III
MEE pulse
Si
Ga
Si
Si during As soak
Ga
Si
Double Si doping
Ga
• Electron concentration nearly constant
• Si prefers Group III site even under As-poor conditions
• Increased mobility by MEE
Wistey, EMC 2009
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Regrown InAs S/D FETs
4.7 nm Al203, 5×1012 cm-2 pulse doping
In=9.7E-8, Ga=5.1E-8 Torr
top of gate
InAs
regrowth
side of gate
Mo S/D metal with
N+ InAs underneath
• InAs native defects are donors.1
• Reduces surface depletion.
• Decreased As flux works for InAs too.
• Gallium-free
= improved selectivity in regrowth
1
Wistey, EMC 2009
Bhargava et al , APL 1997
SEM: Uttam Singisetti
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InAs Source-Drain Access Resistance*
*Wistey et al, NAMBE 2009
4.7 nm Al203, InAs S/D E-FET. TLMs corrected for metal resistance.
• Total Ron = 600 Ω-μm ➡ Rs < 300 Ω−μm.
• gm << 1/Rs ~ 3.3 mS/μm -- Not source-limited.
InAs contacts no longer limit MOSFET performance.
Wistey, EMC 2009
Slide: Uttam Singisetti, DRC 2009
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The Shape of Things to Come
Generalized Self-Aligned Regrowth Designs:
Gate
n+ Regrowth
Recessed
Raised
Gate
Top Barrier
Top Barrier
Channel
Back Barrier
Substrate
Channel
Back Barrier
Substrate
• Self-aligned regrowth can also be used for:
• GaN HEMTs (with Nidhi in Mishra group, EMC 2009)
• InGaAs HBTs and HEMTs
• Selective III-V on Si — remove gaps
• THz and high speed III-V electronics
Wistey, EMC 2009
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Conclusions
• Reducing As flux improves filling near gate
• Self-aligned regrowth: a roadmap for scalable III-V FETs
–Provides III-V’s with a salicide equivalent
–Can improve GaN and GaAs FETs too
• Silicon doping impervious to MEE technique
• InAs regrown contacts improve InGaAs MOSFETs...
–Not limited by source resistance @ 1 mA/µm
–Comparable to other III-V FETs... but now scalable
Wistey, EMC 2009
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Acknowledgements
• Rodwell & Gossard Groups (UCSB): Uttam Singisetti,
Greg Burek, Ashish Baraskar, Vibhor Jain...
• McIntyre Group (Stanford): Eunji Kim, Byungha Shin,
Paul McIntyre
• Stemmer Group (UCSB): Joël Cagnon, Susanne
Stemmer
• Palmstrøm Group (UCSB): Erdem Arkun, Chris
Palmstrøm
• SRC/GRC funding
• UCSB Nanofab: Brian Thibeault, NSF
Wistey, EMC 2009
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