Transcript 下載/瀏覽

IV. Implementation system by
Hardware
Fig.3 Experimental system.
IV. Implementation system by
Hardware
Activity of Hardware
• The experimental system is shown in Fig.3. Firstly, the
power supplies AC voltage 110V to converter;
• Then the AC to DC converter converts the voltage from
AC signal to DC signal includes: 5V DC supplies to ICs;
and also transformer which transforms to 15V DC
supplies to IGBTs.
• DC motor driver board specialized circuits (motor drivers)
have been developed to supply motors with power and
to isolate the other ICs from electrical problems (12V).
• The encoder using the 24V DC is supplied by power
supply; DC motor uses the 24V DC. The FPGA uses
Altera DE2 EP2C35 which is a core component in this
system and used to develop the proposed controller.
IV. Implementation system by
Hardware
Circuit for speed
loop fuzzy
controller
Fig. 4 Internal circuit of the proposed FPGA-based motion control IC for DC motor drive.
IV. Implementation system by
Hardware
•
•
•
•
•
•
For the progress of VLSI technology, the FPGA has been widely investigated due
to its programmable hard-wired feature, fast time-to-market, shorter design cycle,
embedding processor, low power consumption, and higher density for
implementing digital control system [5]–[9].
The FPGA provides a compromise between the special-purpose applicationspecific integrated circuit hardware and general-purpose processors [10].
Therefore, using an FPGA to form a compact, low-cost, and high-performance
servo system for precision machine has become an important issue. However, in
many research works, the FPGA is merely used to realize the hardware part of the
overall control system [8], [11].
In recent years, an embedded processor intellectual property (IP) and an
application IP can now be developed and downloaded into the FPGA to construct a
system-on-a-programmable-chip (SoPC) environment [15].
SOPC Builder is an automated system development tool that dramatically
simplifies the task of creating high-performance SOPC designs. The tool
accelerates time-to-market by automating the system definition and integration
phases of SOPC development.
SOPC Builder is integrated within the Altera Quartus II software to give
programmable logic device (PLD) designers immediate access to a revolutionary
new development tool.
Fuzzy
controller
speed
loop IP
NiosII
processor
Alteral SOPC
Builder
Nios II IDE