Applied Logic & Computation in System Design - An invitation to A L
Download
Report
Transcript Applied Logic & Computation in System Design - An invitation to A L
m
Applied Logic & Computation in System Design
- An invitation to ALCom Lab
Jie-Hong R. Jiang
江介宏
DEE/GIEE
National Taiwan University
10/13/2006
About ALCom Lab
Founded in August 2005
Caring about solving a good problem
cleverly
We are cooking a pleasant research
environment and a culture of creativity
Regular boardgame nights
Puzzle solving
Focus/study groups
…
Aiming high and identifying a niche
m
New blood wanted!
We desperately eager for talented students
joining us to claim challenging and exciting
research projects
m
Yes, you are one of the talents!
m
Where are we heading?
Verification
Optimization
Foundations
m
Challenges
Verification
Optimization
60-80% design time is spent on verification
3-to-1 head count ratio between verification
engineers and logic designers
Stringent design constraints on
power/timing/yield, etc.
Foundations
Design beyond silicon? New models of
computation?
m
Equivalence verification
Algorithm
Architecture 1
(e.g. synchronous)
?
Architecture 2
(e.g. asynchronous)
=
?
register-transfer level
=
?
?
gate level 1 = gate level 2
m
Property verification
Identify invariants
Ex.
+
1 + 2 +…+n
n + n-1 + … + 1
Apply induction
Ex.
x
y
?
?
z = xy
x
y
?
x-1
y
?
+
m
Synthesis & optimization
I
Existing IP
O
X
m
More info
Contact me at
[email protected]
Consult webpage at
http://alcom.ee.ntu.edu.tw
http://cc.ee.ntu.edu.tw/~jhjiang
m