ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 8: September 21, 2012 Delay and RC Response Penn ESE370 Fall2012 -- DeHon.

Download Report

Transcript ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 8: September 21, 2012 Delay and RC Response Penn ESE370 Fall2012 -- DeHon.

ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 8: September 21, 2012 Delay and RC Response 1 Penn ESE370 Fall2012 -- DeHon

Delay is RC Charging Penn ESE370 Fall2012 -- DeHon 2

Delay is RC Charging Strategy • Understand switch state • Break into stages • For each stage – Understand R drive – Understand C load Penn ESE370 Fall2012 -- DeHon 3

Today • RC Charging • RC Step Response • What is the C?

• What is the R?

• Measuring Delay Penn ESE370 Fall2012 -- DeHon 4

Penn ESE370 Fall2012 -- DeHon 90% Rise Time?

5

What does response look like?

Penn ESE370 Fall2012 -- DeHon about 2ps for 90% rise 6

Governing Equations? (KCL) • KCL @ Vmeasure?

• Current across Resistor?

• Current into Capacitor?

7 Penn ESE370 Fall2012 -- DeHon

Equations

Vin

Vmeasure R

C dVmeasure dt dVmeasure dt

Vin

Vmeasure RC

  Penn ESE370 Fall2012 -- DeHon 8

Solve Vmeasure 

dVmeasure dt

Vin

Vmeasure RC

What’s Vmeasure?

Vmeasure

Vin

   1  

e

t RC

     Penn ESE370 Fall2012 -- DeHon 9 

 What does look like?

V

(

t

) Penn ESE370 Fall2012 -- DeHon   1 

e

t

/(

RC

) 

V

10

 Shape of Curve Fillin on board

e -x 1-e -x x

0 0.1

1 2 2.3

V

(

t

) Penn ESE370 Fall2012 -- DeHon   1 

e

t

/(

RC

) 

V

11

 Shape of Curve

x e -x 1-e -x

0 0.1

1 1 0.9

1/e = 0.37

1/e 2 = 0.14

0 0.1

0.66

2 0.86

2.3

V

(

t

) Penn ESE370 Fall2012 -- DeHon   1  0.1

e

t

/(

RC

) 0.9

V

12

Risetime: 10 —90% Penn ESE370 Fall2012 -- DeHon T rise ~= 2.2ps

13

Penn ESE370 Fall2012 -- DeHon What is C?

14

Capacitance • Wire • MOSFET gate • Logical Gate • Fanout -- Total gate load Penn ESE370 Fall2012 -- DeHon 15

First Order Model • Switch –

Loads input capacitively

• As dig in, understand: – Origin of capacitance – How can we engineer – Tradeoffs Penn ESE370 Fall2012 -- DeHon 16

Logic Gate Input Capacitance • Capacitance on – A input?

– B input?

Penn ESE370 Fall2012 -- DeHon 17

Fanout • Number of things to which a gate output connects 18 Penn ESE370 Fall2012 -- DeHon

Fanout in Circuit • Output routed to many gate inputs Penn ESE370 Fall2012 -- DeHon 19

Fanout in Circuit • Maximum fanout?

• Second?

• Min?

Penn ESE370 Fall2012 -- DeHon 20

Lumped Capacitive Load

C load

 

C g i i

fanout

 

i

wires C w i

 Penn ESE370 Fall2012 -- DeHon 21

Penn ESE370 Fall2012 -- DeHon What is R?

22

Resistance • Wire resistance – Supply to transistor source – Transistor output gate it is driving • Transistor equivalent resistance Penn ESE370 Fall2012 -- DeHon 23

Wire Resistances Penn ESE370 Fall2012 -- DeHon 24

First Order Model • Switch –

Resistive driver

• As dig in, understand: – More sophisticated view – How can we engineer – Tradeoffs Penn ESE370 Fall2012 -- DeHon 25

Equivalent Resistance • What resistances might transistors contribute?

– How many cases?

– Assume Ron same all tr, Resistance of each?

Penn ESE370 Fall2012 -- DeHon 26

Equivalent Resistance • What resistances might transistors contribute?

Input

00 01 10 11

Rout

Ron/2 Ron Ron 2Ron Penn ESE370 Fall2012 -- DeHon 27

Lumped Resistive Source

R drive

R trnet

 

i

wires R w i

R pwr

R trnet = parallel and series combination of R tr  Penn ESE370 Fall2012 -- DeHon 28

Measuring Delay Penn ESE370 Fall2012 -- DeHon 29

Measuring Gate Delay • Next stage starts to switch before first finishes • Measure 50%--50% 67ps 80ps t del = 13ps Penn ESE370 Fall2012 -- DeHon 30

Characterizing Gate/Technology • Delay measure will be – Function of load on gate – Function of input rise time • Which, in turn, may be a function of input loading 31 Penn ESE370 Fall2012 -- DeHon

Delay vs. Risetime 1ps rise 100ps rise 10ps delay Penn ESE370 Fall2012 -- DeHon 20ps delay 32

Characterizing Gate/Technology • Delay measure will be – Function of load on gate – Function of input rise time • Which, in turn, may be a function of input loading • Want to understand typical – At least comparable 33 Penn ESE370 Fall2012 -- DeHon

Measuring/Characterizing • Drive with a gate – Not an ideal source • Measure loaded gate – Typical loading – FO4 Penn ESE370 Fall2012 -- DeHon 34

HW2 Recommendation Penn ESE370 Fall2012 -- DeHon 35

Rise/Fall • Rise and Fall time may differ – Why?

– What is ratio?

Input

00 01 10 11

Rout

Ron/2 Ron Ron 2Ron Penn ESE370 Fall2012 -- DeHon 36

• HW3 posted Admin Penn ESE370 Fall2012 -- DeHon 37

Delay is RC Charging Penn ESE370 Fall2012 -- DeHon 38