Transcript pptx - kek

GEMを用いた大アクセプタ
ンス検出器に用いる読み出
し回路の開発 検討
東大・理 小沢 恭一郎
Example: E16 Detector
Tracker
~100μm の分解能
ハイレートへの耐性(5kHz/mm2)
少ない物質量
(1チャンバーにつき~0.1% )
Electron identification
Large acceptance
High pion rejection @ 90% e-eff.
100 @ Gas Cherenkov
25 @ EMCal
2010/06/04
K. Ozawa
2
Items
Develop 1 detector unit and make 26 units.
GEM Tracker
CsI + GEM
photo-cathode
50cm gas(CF4) radiator
~ 32 p.e. expected
CF4 also for
multiplication in GEM
Ionization (Drift gap)
+ Multiplication (GEM)
High rate capability
+ 2D strip readout
2010/06/04
Hadron Blind detector3
K. Ozawa
Gas Cherenkov for e-ID
GEM Tracker
Collaboration with KEK
Gas: p10 or Ar/CO2
Currently, p10 gas is used
due to a large diffusion.
700 mm pitch
(350 mm x 2)
for both side
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K. Ozawa
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Easy signal handling
Pulse shape

Prof. S. Uno @ MPGD WS
GEM Response function
No magnetic Field/ No Drift region
σ=359.7±0.4 μm
Signal from GEM foil
150mV
P10
σ=181.2±0.3 μm
Ar-CO2
(70/3
0)
Signal from
Readout pad
80ns
Response function
Time constant is from the drift
Width of signal spread is consistent with
time in the last gap. (No ion tail) transverse diffusion in GEM (along
It can be reduced to ~20ns. 3layers ).
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K. Ozawa
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Read out configuration
FPGA Board
Depends on each experiment
ASIC
Detector out
Initial Charge ~ 100e
GEM gain ~ 104
Capacitance: Strip
2010/06/04
Front-end:
Charge-sensitive
preamplifier
Ci ~ 1pF
Shaper
K. Ozawa
Digitize:
Charge
Timing
Time Spread
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Front-End Electronics: Candidate 1
APV-S1 chip
• Originally, it’s developed for CMS Si detector.
• Also, it’s used for COMPASS GEM
2010/06/04
K. Ozawa
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Prof. T. Fusayasu @ IEEE/NSS
Candidate 2: Fusayasu chip
Made by T. Fusayasu for GEM x-ray detector (strip readout)
2010/06/04
–
–
–
–
–
–
8 chs./package
Input range 50fC ~ 1pC
10MHz-10bit ADC and 100MHz-10bit TDC
Operating voltage ±2.5V
Power 50mW/ch
K. Ozawa
noise 15000e @Cd=50pF
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Dr. T. Uchida@ MPGD WS
Front End ASIC by KEK
FE200X
2010/06/04
• Front end ASIC for gas detector
– Developed by KEK Dr. Fujita
• Specification
– Amp. ,shaper, discriminator
– 8 chs./package
– Output 8 LVDS, 1 analog-sum
– Operating voltage ±2.5V
– Power 30mW/ch
– Input range -1.5pC~ +1.5pC
– noise 6000e @Cd=100pF
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Ozawa
Not including K.
ADC,
Just 1 bit information per channel
ILC R&D
• Pre-amp/Shaper chip:
– 16 chan/chip*8chips/card=128chan/card
– Gain & shaping time adjustable
– 400 e’s noise in reasonably large system
• Digitizer based upon ALTRO chip:
– 10 bit 20 MHz ADC
– 1k sample storage
• In Japan,
– A. Sugiyama (Saga University)
– T. Fusayasu (Nagasaki Institute of Applied
Science )
• In addition, they are developing a pixel readout
chip. QPIX: 100mm pixel, 0.5p max inputs, 14
bits ADC, 10ns timing resolution
2009/9/12
K. Ozawa
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QPIX
Prof. A. Matsuzawa (TIT)
Chip area can be reduced to 100um x 100um
by further circuit optimization.
0.18um CMOS
100 mm
1 : 6b-SAR ADC
6
5
4
8
3
2
Further
optimization
2 : OP Amp
3 : Comparator
140 mm
100 mm
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4 : 14b-Register
5 : 8b-ToT Counter
6 : Control Logic
7 : 14b-ToF
Register
1
8 : MIM Cap (2p)
200 mm
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K. Ozawa
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Prof. A. Matsuzawa (TIT)
Performance table
End of ‘09
Now
QPIX.v.1
QPIX v.0
Timepix
Dimensions
100x 100μm2
140 x 200μm2
50 x 50μm2
Preamp Gain
0.5-5mV/fC
0.45mV/fC
100mV/fC
1-10fC
10 fC
0.1 fC
8fC/0.5pC
26fC/1.6pC
-
TOF: 14bits
TOF: 14bits
TOT: 8bits
TOT: 8bits
14bits
(TOF or TOT or
counter)
ADC: 6bit,
10Msps
ADC: 6bit
10Msps
None
30uW
350uW (80uW)
6.5uW
Parallel
Parallel
Serial/Parallel
Comparator threshold
ADC LSB/MSB
Readout information
Power
Read out
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Hadron Blind Detector
CsI光電面によるCherenkov光検出器
CF4
Radiator
• 紫外域に感度を持つCsI光電面
– Cherenkov光検出に最適
– GEM上面にCsI光電面を蒸着
– 100 mm GEMを用いる
• Radiator ガス: CF4
– High transmission @ UV
– p Threshold 4 GeV/c
• GEM3層を電子増幅に使用
– Gain ~ 800 @ CsI GEM
Important for e/p
• Pad読み出しで位置情報も
MESH
Ionization
(40)
5.25 mm
CsI
LCP
(100um)
3.25 mm
32 x 800
50um
GEM
1.5 mm
50um
GEM
2 mm
• 逆電圧による電離電子の抑
制!!
2010/06/04
Electron
pad
K. Ozawa
By K. Aoki
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Ref. NIM A523, 345, 2004
Read out configuration
Preamp-Card
Detector out
Initial Charge ~ a few e
GEM gain ~ 104
Capacitance:
Large Pad
2010/06/04
Front-end:
Charge-sensitive
preamplifier
Ci ~ 1pF
Shaper
K. Ozawa
FPGA Board
commercial FADC
Digitize:
Charge
Timing
Time Spread
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PHENIX Pre Amplifier
15 mm
Charge Preamp with On-Board Cable Driver
Features:
19 mm
1) +/- 5V power supply.
2)
165 mW power dissipation.
3)
Bipolar operation (Q_input = +/- )
4)
Differential outputs for driving 100 ohm twisted pair cable.
5)
Large output voltage swing -- +/- 1.5V (cable terminated at both ends)
Preamp (BNL IO-1195)
2304 channels total
(+/- 3V at driver output)
6)
Low noise: Q_noise = 345e (C_external = 5pF, shaping = .25us)
(Cf = 1pF, Rf = 1meg)
7)
Size = 1.04” x 0.775” 10pins
8)
Preamp output (internal) will operate +/- 2.5V to handle large pile-up.
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IO1195-1-REVA
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Test with GEM Detector
PA Pulse Trace on Scope
•Input capacitance ~ 0.0 pF??
•20 pe x 5E3 (gain) ~
100,000 electron input into
pre-amp
• Baseline Noise~ 1100e-’s
after background is subtracted
off.
Pulser Input (1.2pF)~
13mV100,000 e-’s
s (Baseline Noise)
~1100 e-’s
PA Output~48mV
ADC Data: Fe 55 Pulse Height Spectrum in pure CF4
(IO1195 PreAmp)
70
60
Gain ~ 1700
FWHM % Res~38%
 PA Pulse Height Spectrum
40
30
20
B.Azmoun
10
ADC Ch.
989
946
903
860
817
774
731
688
645
602
559
516
473
430
387
344
301
2010/06/04
258
215
172
86
129
0
0
43
Counts
50
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FEM Block
Diagram
FPGA
Connector
Receive/buffer
ADC data
Differential
Receiver
8
Channels
65 MHz
12 bits
ADC
Format triggered
Events
Generate L1
Primitives
Receive timing
/clocks
2010/06/04
GTM/Ethernet
FEM
FEM
FEM
LL1 trigger
FEM Crate
Diagram
Trigger data
interface
Data
path
FEM Optical
K. Ozawa
Detector
signals
DCM
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The 8 channel 12 bits 65MHzADC
TI ADS5272
The ADC receives differential signals
The Vcommon is 1.5V
The +/- input can swing from 1V to 2V
+ side 2V, - side 1V -> highest count
- side 2V, + side 1V -> lowest count
Our +/- input will swing from 1.5 to 2V/ 1 to
1.5V
we will only get 11 bits out of 12 bits
16fc will be roughly sitting 200 count
We will run the ADC at 6X beam crossing clock
6X9.4 MHz = 56.4 MHz or ~17.7ns per
samples
2010/06/04
K. Ozawa
Cost: $25 per channel
19
HBD FEM
Clock
input
Trigger
output
Signal cable
input
2010/06/04
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まとめ
• E16実験のための検出器開発が、理研、東大な
どで活発に行われている。読み出し回路の開発
はこれから。
• High Beam intensityと大立体角測定に対応
するためGEM Trackerを使用する。
– 読み出しは、ストリップ
– Front-end は集積度を上げる必要がある。
• 大立体角で電子識別を行うために、CsI +
GEMを光電面に用いたチェレンコフ光検出器
(Hadron Blind Detector)を使用する。
– 平均20p.e.程度しか期待できないため、low noise
は必須
– そのあとは出来るだけ安く上げたい。
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BACK UP
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Good @ high rate counting
• MWPC limitation
– Wire spacing: 1~2 mm
– Gain dropping @ high rate
• Micro strip gas chamber
– Discharge problem
• Micromegas
MWPC
– Another candidate
• GEM
– Flat gain over 105 Hz/mm2
– I like flexibility of configuration
– Good characteristics of signal
• Signal is generated by electron
• Not by ion
• No ion tail and pole cancellation
electronics
104 105
GEM
104 105
I took these ideas and figures from F. Sauli’s presentation at XIV
GIORNATE
2010/06/04DI STUDIO SUI RIVELATORI
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K. OzawaVilla Gualino 10-13 Febbraio 2004
Frontend OP amp
Standard Folded-Cascode OP amp
2010/06/04
K. Ozawa
OP amp feature obtained
by schematic simulation
DC Open loop gain
64.2dB
gain band width
63.1MHz
phase margin
77.4°
Common-mode gain
-16.7dB
Common-mode rejection ratio
80.4dB
PSRR+
70.1dB
PSRR-
84.1dB
output impedance
414kΩ
slew rate
148V/us
settling time (1%)
26.1ns
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Test Charge Measurement
ADC count vs. Input Charge
1200
1pF
1pF
+
800
600
~
VT=40mV
400
~
~
ADC count [LSB]
1000
ADC
GEMFE2
ch0
200
0
0
200
400
600
800
1000
Qin [fC]
Test Pulse
Deviation from Linear Slope
ADC count Deviation [LSB]
25
100ns
20
15
10
5
0
-5
-10
0
2010/06/04
200
400
600
Qin [fC]
800
K. Ozawa
1000
Good linearity was
obtained at 1MHz ADC
operation except for lower
and upper edge of the
25
range.
Noise Measurement
Noise Properties of GEMFE2
30000
ENC [Electrons]
25000
20000
15000
M C LK =1M H z
M C LK =2M H z
10000
5000
0
0
20
40
60
80
100
120
Detector Capacitance [pF]
10k electrons @ Cd=0pF (15k@50pF)  Enough for our purpose.
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CSIを用いた光電面
• 3種類の光電子収集の方法
Transmissive
By Weitzman
• Transmissiveを選択
– 比較的高い量子効率
– 少ないphoton feedback
一番上のGEMにCSIを蒸着して実現
5
10
CSIの量子効率
2010/06/04
15
[eV]
K. Ozawa
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HBD FEE
•
48 channels per FEM
•
Interface module
•
Data output module
•
Crate has
•
•
•
•
HBD readout will fit into 3 6U crates
HBD LL1 module potentially could fit into one 6U crate.
Power – 5V digital, +4 analog, -3.3V analog – 1KW per crate (?)
We will use a standard VME 6U crate mechanics with custom backplane.
•
Need space to route the signal cables to the FEM
–
–
–
–
3 signal cables to detector.
4 signal pairs to HBD LL1 crate – within the racks
Clock cable from interface to the FEM – within the crates (back)
6UX160mm card size
– GTM (clock, L1 trigger etc.), Ethernet interface for slow download.
– Control test pulse – don’t know the cable size yet.
– 1 optical module per card
– 16 FEMs
– 4 optical output modules
– 1 interface module
– We will bring the crates.
– Need to know how long is the cable routing path- Signal cables are custom made
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Use 2MM Hard Metric cable to
move signals between
preamp/FEM
2mm HM connector has 5 pins per row
and 2mm spacing between pins and
rows
There are two types of cable
configuration:
*100 ohms parallel shielded cable
50 ohms
Signal
coaxial
arrangement
cable
S- S+ G S+ S-
Our choice is
This gives us signal density 2mm x 10mm for every 2 signals.
Same type of cables will be used for L1 trigger data.
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The differential
receiver
Use Analog Device
AD8138 receiver
gain
set up as unity
Simulation result
For 16fc input
charge
Total voltage
On the cable
Total voltage
Seen by ADC
2010/06/04
ADC +/- inputs
K. Ozawa
ADC has 1V range
Max ADC range is
about ~10 time of 16
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