Transcript Development of Virtual FPGA lab and FPGA

Project Progress Presentation
Nina Drozd
Supervisor: Fearghal Morgan
Co-Supervisor: Martin Glavin
C:/Users/NUIG/Documents &
Settings/Desktop/tg/fpgalab/fpgalab/
static/applets
Remote USB
controlled
lamp
Access system using
riviera.nuigalway.ie server, add
tunnels for proxy &
sharkdog.nuigalway.ie
Set up and log
into compsoc
account, then
ssh into
sharkdog
(specific
username
needed), and
ssh into
[email protected]
8.0.3
Use tight VNC when desktop
view of the system is needed,
easier for developer use
System is of datamodel-view
architecture, in order
to change anything in
the system, all 3
components must be
modified
demo
Check user
name against
user
database,
check that
password
corresponds
demo
demo
Simple demos
available for
unregistered
user, uploads
defined
bitstreams
Redirects the user to register page
Added virtual switch access, improved user interface, added
VHDL sample project, need to package and create user guide
Virtual switches &
buttons, when
pressed, toggle
pressed bit in
dedicated CSR 9
and 8.
Provide better
support for online
vhdl testing.
Image
processing,
most functions
work, problems
with some
CSR, SRAM read
and write demo,
last 3 CSR buttons
used for testing,
will be removed
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Account creation needs to be revised
Yet to improve:
◦ Monitoring of all accounts by admin, know
bitstream files uploaded, last login, etc.
◦ Query about vhdl or website use sent to admin
email using mail form
◦ User manual to create account and test bitstream
files properly
◦ Admin has power over account creation, reg key
requested from admin.
◦ Questionnaire used to improve website and system
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Tidy up the website
Registration: request reg. key from admin via email form
Account management & statistics:
◦ Database files stored in ..\fpgalab\sqlobject-history, need to add
user_name as parameter in bitstreams database
◦ Bitstreams uploaded stored in fpgalab\uploads
◦ Unique session key for each user, need to assign to user_name and count
sessions for user, after 5 sessions ask to fill out questionnaire, etc.
◦ If user inactive for e.g. 10 minutes, log off to allow access to others.
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Package VHDL project (need to do function for each virtual
switch), remove unused components (DSP just for demo)
Documentation:
◦ Basic system structure done, need to add details of file locations
◦ Guide for developer login into system (done)
◦ User guide (research done, creation in progress)