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Digital Integrated
Circuits
A Design Perspective
Jan M. Rabaey
Anantha Chandrakasan
Borivoje Nikolic
The Devices
July 30, 2002
© Digital Integrated Circuits2nd
Devices
Goal of this chapter
Present intuitive understanding of device
operation
Introduction of basic device equations
Introduction of models for manual
analysis
Introduction of models for SPICE
simulation
Analysis of secondary and deep-submicron effects
Future trends
© Digital Integrated Circuits2nd
Devices
The Diode
B
A
Al
SiO2
p
n
Cross-section of pn-junction in an IC process
A
p
Al
A
n
B
One-dimensional
representation
B
diode symbol
Mostly occurring as parasitic element in Digital ICs
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Devices
Depletion Region
hole diffusion
electron diffusion
(a) Current flow.
n
p
hole drift
electron drift
Charge
Density
x
Distance
+
-
Electrical
Field
(b) Charge density.
x
(c) Electric field.
V
Potential
-W 1
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W2
x
(d) Electrostatic
potential.
Devices
Diode Current
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Devices
pn (W2)
Forward Bias
pn0
Lp
np0
p-region
-W1 0
W2
n-region
x
diffusion
Typically avoided in Digital ICs
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Devices
Reverse Bias
pn0
np0
p-region
-W1 0
W2
x
n-region
diffusion
The Dominant Operation Mode
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Devices
Models for Manual Analysis
+
ID = IS(eV D/T – 1)
VD
ID
+
+
VD
–
(a) Ideal diode model
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–
VDon
–
(b) First-order diode model
Devices
Junction Capacitance
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Devices
Diffusion Capacitance
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Devices
Secondary Effects
ID (A)
0.1
0
–0.1
–25.0
–15.0
–5.0
0
5.0
VD (V)
Avalanche Breakdown
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Devices
Diode Model
RS
+
VD
ID
CD
-
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Devices
SPICE Parameters
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Devices
What is a Transistor?
A Switch!
An MOS Transistor
VGS V T
|VGS|
Ron
S
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D
Devices
The MOS Transistor
Polysilicon
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Aluminum
Devices
MOS Transistors Types and Symbols
D
D
G
G
S
S
NMOS Enhancement NMOS Depletion
D
G
G
S
PMOS Enhancement
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D
B
S
NMOS with
Bulk Contact
Devices
Threshold Voltage: Concept
+
S
VGS
-
D
G
n+
n+
Depletion
Region
n-channel
p-substrate
B
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Devices
The Threshold Voltage
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Devices
The Body Effect
0.9
0.85
0.8
0.75
VT (V)
0.7
0.65
0.6
0.55
0.5
0.45
0.4
-2.5
-2
-1.5
-1
V
BS
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-0.5
0
(V)
Devices
Current-Voltage Relations
A good ol’ transistor
6
x 10
-4
VGS= 2.5 V
5
Resistive
Saturation
4
ID (A)
VGS= 2.0 V
3
VDS = VGS - VT
2
VGS= 1.5 V
1
0
Quadratic
Relationship
VGS= 1.0 V
0
0.5
1
1.5
2
2.5
VDS (V)
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Devices
Transistor in Linear
VGS
VDS
S
G
n+
– V(x)
ID
D
n+
+
L
x
p-substrate
B
MOS transistor and its bias conditions
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Devices
Transistor in Saturation
VGS
VDS > VGS - VT
G
D
S
n+
-
VGS - VT
+
n+
Pinch-off
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Devices
Current-Voltage Relations
Long-Channel Device
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Devices
A model for manual analysis
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Devices
Current-Voltage Relations
The Deep-Submicron Era
2.5
x 10
-4
VGS= 2.5 V
Early Saturation
2
VGS= 2.0 V
ID (A)
1.5
VGS= 1.5 V
1
0.5
0
Linear
Relationship
VGS= 1.0 V
0
0.5
1
1.5
2
2.5
VDS (V)
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Devices
u n (m/s)
Velocity Saturation
usat = 105
Constant velocity
Constant mobility (slope = µ)
c = 1.5
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(V/µm)
Devices
Perspective
ID
Long-channel device
VGS = VDD
Short-channel device
V DSAT
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VGS - V T
VDS
Devices
ID versus VGS
-4
6
x 10
-4
x 10
2.5
5
2
4
linear
quadratic
ID (A)
I D (A)
1.5
3
1
2
0.5
1
0
0
quadratic
0.5
1
1.5
VGS(V)
Long Channel
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2
2.5
0
0
0.5
1
1.5
2
2.5
VGS(V)
Short Channel
Devices
ID versus VDS
-4
6
-4
x 10
VGS= 2.5 V
x 10
2.5
VGS= 2.5 V
5
2
Resistive Saturation
ID (A)
VGS= 2.0 V
3
VDS = VGS - VT
2
1
VGS= 1.5 V
0.5
VGS= 1.0 V
VGS= 1.5 V
1
0
0
VGS= 2.0 V
1.5
ID (A)
4
VGS= 1.0 V
0.5
1
1.5
VDS(V)
Long Channel
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2
2.5
0
0
0.5
1
1.5
2
VDS(V)
Short Channel
Devices
2.5
A unified model
for manual analysis
G
S
D
B
© Digital Integrated Circuits2nd
Devices
Simple Model versus SPICE
2.5
x 10
-4
VDS=VDSAT
2
Velocity
Saturated
ID (A)
1.5
Linear
1
VDSAT=VGT
0.5
VDS=VGT
0
0
0.5
Saturated
1
1.5
2
2.5
VDS (V)
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Devices
A PMOS Transistor
-4
0
x 10
VGS = -1.0V
-0.2
VGS = -1.5V
ID (A)
-0.4
-0.6
-0.8
-1
-2.5
VGS = -2.0V
Assume all variables
negative!
VGS = -2.5V
-2
-1.5
-1
-0.5
0
VDS (V)
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Devices
Transistor Model
for Manual Analysis
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Devices
The Transistor as a Switch
VGS V T
Ron
S
ID
V GS = VD D
D
Rmid
R0
V DS
VDD/2
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VDD
Devices
The Transistor as a Switch
7
x 10
5
6
Req (Ohm)
5
4
3
2
1
0
0.5
1
1.5
V
DD
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2
2.5
(V)
Devices
The Transistor as a Switch
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Devices
MOS Capacitances
Dynamic Behavior
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Devices
Dynamic Behavior of MOS Transistor
G
CGS
CGD
D
S
CGB
CSB
CDB
B
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Devices
The Gate Capacitance
Polysilicon gate
Source
Drain
xd
n+
xd
Ld
W
n+
Gate-bulk
overlap
Top view
Gate oxide
tox
n+
L
n+
Cross section
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Devices
Gate Capacitance
G
G
CGC
CGC
D
S
G
Cut-off
CGC
D
S
Resistive
D
S
Saturation
Most important regions in digital design: saturation and cut-off
© Digital Integrated Circuits2nd
Devices
Gate Capacitance
CG C
WLC ox
WLC ox
CGC B
C G CS = CG CD
WLC ox
CG C
VG S
Capacitance as a function of VGS
(with VDS = 0)
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3
WLC ox
CGCD
2
2
2WLC ox
CG CS
0
VDS /(VG S-VT)
1
Capacitance as a function of the
degree of saturation
Devices
Measuring the Gate Cap
3 102 16
10
I
9
Gate Capacitance (F)
V GS
8
7
6
5
4
3
2
2 2 2 1.5 2 1 2 0.5 0 0.5 1
V GS (V)
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1.5 2
Devices
Diffusion Capacitance
Channel-stop implant
N A1
Side wall
Source
ND
W
Bottom
xj
Side wall
LS
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Channel
Substrate N A
Devices
Junction Capacitance
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Devices
Linearizing the Junction Capacitance
Replace non-linear capacitance by
large-signal equivalent linear capacitance
which displaces equal charge
over voltage swing of interest
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Devices
Capacitances in 0.25 mm CMOS
process
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Devices
The Sub-Micron MOS Transistor
Threshold
Variations
Subthreshold Conduction
Parasitic Resistances
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Devices
Threshold Variations
VT
VT
Long-channel threshold
L
Threshold as a function of
the length (for low VDS )
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Low VDS threshold
VDS
Drain-induced barrier lowering
(for low L)
Devices
Sub-Threshold Conduction
The Slope Factor
-2
10
Linear
-4
I D ~ I 0e
10
-6
Quadratic
CD
, n 1
Cox
S is DVGS for ID2/ID1 =10
ID (A)
10
qVGS
nkT
-8
10
-10
Exponential
-12
VT
10
10
0
0.5
1
1.5
2
2.5
Typical values for S:
60 .. 100 mV/decade
VGS (V)
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Devices
Sub-Threshold ID vs VGS
I D I 0e
qVGS
nkT
qV
DS
1 e kT
VDS from 0 to 0.5V
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Devices
Sub-Threshold ID vs VDS
I D I 0e
qVGS
nkT
qV
DS
1 e kT
1 VDS
VGS from 0 to 0.3V
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Devices
Summary of MOSFET Operating
Regions
Strong
Inversion VGS > VT
Linear (Resistive) VDS < VDSAT
Saturated (Constant Current) VDS VDSAT
Weak
Inversion (Sub-Threshold) VGS VT
Exponential in VGS with linear VDS dependence
© Digital Integrated Circuits2nd
Devices
Parasitic Resistances
Polysilicon gate
LD
G
Drain
contact
D
S
RS
W
VGS,eff
RD
Drain
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Devices
Latch-up
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Devices
Future Perspectives
25 nm FINFET MOS transistor
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Devices