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Elettronica T
parte II
Docente: Luca Benini
[email protected]
Tutor: A. Pieracci
[email protected]
A.A. 20010/2011
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
What you’ll learn...
Introduction to digital electronics
» Elementary devices
» Basic conventions and definition
» The evolution of digital electronic
Designing digital integrated circuits
» Combinational Circuits
» Sequential circuits
» Basic design methodologies and techniques
Understanding digital circuits characteristics
» Know what to expect
» Understand how to use them
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Logistics
Instructor’s office hours
» Wednesday afternoon (14-15), or by appointment (e-mail)
» Tutor: email
Textbook
» J. Rabaey, A. Chandrakasan, B. Nikolic,
“Circuiti integrati digitali," 2a edizione,
Prentice-Hall 2005.
» http://bwrc.eecs.berkeley.edu/IcBook/
» N. Weste, D. Harris, “CMOS VLSI Design” 3rd Ed., Addison-Wesley
2004
Lecture notes
» WEB site
http://www-micrel.deis.unibo.it/ELET2
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Exam and Grades
A final exam
» Part II: 18/12
» Part I + Part II: 18/12
Oral exam is optional
» final grade = (written_exam_grade + oral_exam_grade)/2
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Introduction
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
The First Computer
The Babbage
Difference Engine
(1832)
25,000 parts
cost: £17,470
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
ENIAC - The first electronic computer
(1946)
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
The transistor revolution
First transistor
Bell Labs, 1948
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
The first integrated circuit
ECL 3-input Gate
Motorola 1966
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Moore’s Law
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Electronics, April 19, 1965.
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
In 1965, Gordon Moore noted that the number of transistors on a chip
doubled every 18 to 24 months
He made a prediction that semiconductor technology will double its
effectiveness every 18 months
LOG2 OF THE NUMBER OF
COMPONENTS PER INTEGRATED FUNCTION
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Transistor Counts
1 Billion
Transistors
K
1,000,000
100,000
10,000
1,000
i486
i386
80286
100
10
Pentium® III
Pentium® II
Pentium® Pro
Pentium®
8086
Source: Intel
1
1975 1980 1985 1990 1995 2000 2005 2010
Courtesy, Intel Projected
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Moore’s law in Microprocessors
Transistors (MT)
1000
2X growth in 1.96 years!
100
10
486
1
Courtesy, Intel
386
286
0.1
0.01
P6
Pentium® proc
8086
8080
8008
4004
8085
0.001
1970
1980
1990
Year
2000
2010
Transistors on Lead Microprocessors double every 2 years
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Die Size Growth
Die size (mm)
100
10
8080
8008
4004
1
1970
8086
8085
1980
286
386
P6
Pentium
® proc
486
Courtesy, Intel
~7% growth per year
~2X growth in 10 years
1990
Year
2000
2010
Die size grows by 14% to satisfy Moore’s Law
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Frequency
Frequency (Mhz)
10000
Doubles every
2 years
1000
100
486
10
8085
1
0.1
1970
8086 286
Now it’s over!
P6
Pentium ® proc
Courtesy, Intel
386
8080
8008
4004
1980
1990
Year
2000
2010
Lead Microprocessors frequency doubles every 2 years
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Power is a major problem
100000
18KW
5KW
1.5KW
500W
Power (Watts)
10000
1000
Hard bound
Pentium® proc
100
286 486
8086 386
10
8085
8080
8008
1 4004
Courtesy, Intel
0.1
1971 1974 1978 1985 1992 2000 2004 2008
Year
Power delivery and dissipation will be prohibitive
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Power density
Power Density (W/cm2)
10000
Rocket
Nozzle
1000
Nuclear
Reactor
100
Courtesy, Intel
8086
10 4004
Hot Plate
P6
8008 8085
Pentium® proc
386
286
486
8080
1
1970
1980
1990
2000
2010
Year
Power density too high to keep junctions at low temp
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Not Only Microprocessors
Cell
Phone
Small
Signal RF
Digital Cellular Market
(Phones Shipped)
Power
RF
Power
Management
1996 1997 1998 1999 2000
Units
48M 86M 162M 260M 435M
(data from Texas Instruments)
Elettronica T AA 2010-2011
Introduction
Analog
Baseband
Digital Baseband
(DSP + MCU)
Digital Integrated Circuits © Prentice Hall 2003
Challenges in Digital Design
DSM
1/DSM
“Macroscopic Issues”
“Microscopic Problems”
• Time-to-Market
• Millions of Gates
• High-Level Abstractions
• Reuse & IP: Portability
• Predictability
• Verification
• Ultra-high speed design
• Interconnect
• Noise, Crosstalk
• Reliability, Manufacturability
• Power Dissipation
• Clock distribution.
Everything Looks a Little Different
?
Elettronica T AA 2010-2011
Introduction
…and There’s a Lot of Them!
Digital Integrated Circuits © Prentice Hall 2003
10,000
10,000,000
100,000
100,000,000
Logic Tr./Chip
Tr./Staff Month.
1,000
1,000,000
10,000
10,000,000
100
100,000
Productivity
(K) Trans./Staff - Mo.
Complexity
Logic Transistor per Chip (M)
Productivity Trends
1,000
1,000,000
58%/Yr. compounded
Complexity growth rate
10
10,000
100
100,000
1,0001
10
10,000
x
0.1
100
xx
0.01
10
xx
x
1
1,000
21%/Yr. compound
Productivity growth rate
x
x
0.1
100
0.01
10
2009
2007
2005
2003
2001
1999
1997
1995
1993
1991
1989
1987
1985
1983
1981
0.001
1
ITRS Roadmap
Source: Sematech
Complexity outpaces design productivity
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Why Scaling?
Technology shrinks by 0.7/generation
With every generation can integrate 2x more functions per chip; chip
cost does not increase significantly
Cost of a function decreases by 2x
But …
» How to design chips with more and more functions?
» Design engineering population does not double every two
years…
Hence, a need for more efficient design methods
» Exploit different levels of abstraction
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Design Abstraction Levels
SYSTEM
MODULE
+
GATE
CIRCUIT
DEVICE
G
S
n+
Elettronica T AA 2010-2011
Introduction
D
n+
Digital Integrated Circuits © Prentice Hall 2003
Design Metrics
How to evaluate performance of a digital circuit (gate, block, …)?
» Cost
» Reliability
» Speed (delay, operating frequency)
» Power dissipation
» Energy to perform a function
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Cost of Integrated Circuits
NRE (non-recurrent engineering) costs
» design time and effort, mask generation
» one-time cost factor
Recurrent costs
» silicon processing, packaging, test
» proportional to volume
» proportional to chip area
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Cost per Transistor
cost:
¢-per-transistor
1
0.1
Fabrication capital cost per transistor (Moore’s law)
0.01
0.001
0.0001
0.00001
0.000001
0.0000001
1982
1985
Elettronica T AA 2010-2011
1988
1991
1994
Introduction
1997
2000
2003
2006
2009
2012
Digital Integrated Circuits © Prentice Hall 2003
NRE Cost is Increasing
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Noise in Digital Integrated Circuits
v(t)
VDD
i(t)
(a) Inductive coupling
(b) Capacitive coupling
(c) Power and ground
noise
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
DC Operation:
Voltage Transfer Characteristic
V(y)
V(x)
V
OH
V(y)
f
V(y)=V(x)
V
Switching Threshold
M
VOL
VOL
V
OH
V(x)
Nominal Voltage Levels
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Mapping between analog and digital signals
"1"
V
OH
V
IH
V(y)
V
Slope = -1
OH
Undefined
Region
"0"
V
IL
V
OL
Elettronica T AA 2010-2011
Slope = -1
VOL
V
Introduction
IL
V
IH
V(x)
Digital Integrated Circuits © Prentice Hall 2003
Definition of Noise Margins
"1"
V
OH
NMH
Noise Margin High
Noise Margin Low
NML
V
IH
Undefined
Region
V
IL
V
OL
"0"
Gate Output
Elettronica T AA 2010-2011
Introduction
Gate Input
Digital Integrated Circuits © Prentice Hall 2003
Noise Budget
Allocates gross noise margin to expected sources of noise
» Supply noise
» Crosstalk
» Interference
» offset
Differentiate between fixed and proportional noise sources
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Impedance
Another key reliability property
Absolute noise margin values are deceptive
» A floating node is more easily disturbed than a node
driven by a low impedance (in terms of voltage)
Noise immunity is the most important metric – the
capability to withstand noise sources
Key metrics: output impedance of the driver and input
impedance of the receiver; also noise gain factors
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
The Regenerative Property
...
v1
v0
v2
v3
v5
v4
v6
(a) A chain of inverters.
v1, v3, ...
v1, v3, ...
finv(v)
f(v)
f(v)
finv(v)
v0, v2, ...
v0, v2, ...
(b) Regenerative gate
Elettronica T AA 2010-2011
(c) Non-regenerative gate
Introduction
Digital Integrated Circuits © Prentice Hall 2003
The Ideal Gate
Vout
Ri =
Ro = 0
g=
Vin
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
VTC of Real Inverter
Vout (V)
4.0
VTL
2.0
0.0
0.0
1.0
2.0
3.0
4.0
5.0
Vin (V)
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Delay Definitions
Vin
50%
t
Vout
t
pHL
t
pLH
90%
50%
10%
tf
Elettronica T AA 2010-2011
t
tr
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Fan-in and Fan-out
(a) Fan-out N
M
(b) Fan-in M
N
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Power Dissipation
Instantaneous power:
p(t) = v(t)i(t) = Vsupplyi(t)
Peak power:
Ppeak = Vsupplyipeak
Average power:
Vsupply t T
1 t T
Pave
p(t )dt
isupplyt dt
t
T t
T
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003
Energy and Energy-Delay
Power-Delay Product (PDP) =
E = Energy per operation = Pav tp
Energy-Delay Product (EDP) =
quality metric of gate = E tp
Elettronica T AA 2010-2011
Introduction
Digital Integrated Circuits © Prentice Hall 2003