Transcript Counters and Registers - Abdullah Al

Counters and Registers
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7-4 Asynchronous (Ripple) down
counter
23=8 ---> MOD-8 Down Counter
7-5 Propagation Delay in Ripple
Counters
 Ripple counters are the simplest type of
counters.
 Although they are simple, they have a major
drawback which is the propagation delay
caused by their operation principle.
7-5 Propagation Delay in Ripple
Counters
7-5 Propagation Delay in Ripple
Counters
7-5 Propagation Delay in Ripple
Counters
 To avoid this problem, we should make sure of the
following:
TClock  N  t pd
f max
1

N  t pd
 N = number of FFs
 Tpd = propagation delay time

Example
 A 4-bit Ripple counter with tpHL= 16 nS and tpLH=
24 nS, using 74LS112 J-K FF. find the maximum
frequency for a proper operation of the counter.
Assume a worst case scenario
1
1
f max 

 10.4 MHz
N  t pd 4  24nS
 For 6-bit Ripple counter that has 6 FFs.

1
1
f max 

 6.9MHz
N  t pd 6  24nS
7-6 SYNCHRONOUS
(PARALLEL) COUNTERS
 The synchronous counters have all of the
FF’s triggered simultaneously. That is, all
the CLK inputs are connected together
 Synchronous counters require more
circuitry than the asynchronous counters.
 Synchronous counters needs extra logic
gates to be added.
7-6 SYNCHRONOUS
(PARALLEL) COUNTERS
Each FF should have its j and k inputs connected such that they
are HIGH only when the outputs of ALL lower-order FFs are in
the HIGH state
7-6 SYNCHRONOUS
(PARALLEL) COUNTERS
 Each FF is clocked by the NGT of
the clock input signal so that all the
FF transitions occur at the same time.
 Only A has its J-K inputs
permanently at the HIGH level.
 A changes at each NGT clock (A
FF toggles)
 B changes when A=1 and a NGT
clock occurs
 C changes when A=B=1 and a
NGT clock occurs
 D changes when A=B=C=1 and
a NGT clock occurs
Advantage of synchronous
Counters over Asynchronous
 In a parallel counter, all FF will change
simultaneously.
 Propagation delay of FF do not add together to
produce the overall delay.
Total delay = FF tpd + AND tpd
Fmax = FF Fmax+AND Fmax
 The total delay is the same no matter how many
FF are used.
 A synchronous counter can operate at much higher
frequency, but the circuitry is more complex than
that of the asynchronous counter.
Example
 Determine fmax for the synchronous MOD16 counter if tpd=50ns for each FF and
tpd=20ns for each AND gate.
1
f max 
14.3MHz
50 20
 Determine the equivalent fmax for
asynchronous MOD-16 counter

1
f max 
 5MHz
4  50
Example
 What must be done to convert this counter to
MOD-32 parallel counter?
 A Fifth Flip-Flop must be added “25=32”
 Determine fmax for the MOD-32 parallel
(synchronous) counter
1
f max 
14.3MHz
50 20
 For a MOD-32 ripple counter
1
f max 
 4MHz
5  50
Unchanged