Transcript [Controlling Gates]

Controlling Gates
Enabling/Disabling Circuits
&
Controlled Inverters
The idea here is to block or unblock
propagation signals
An enable/disable signal serves two basic purposes:
1) One is to block /unblock a data signal from further
propagation.
2) The other one is to logically turn on/off logical
devices (systems/subsystems)
What input combination of the
enable signals will activate this
gate?
{es1, es0} = {0, 1}
Determine the enabling input
combination for these gates
{es2, es1, es0} = {1, 0, 1}
{es3, es2, es1, es0} = {0, 1, 0, 1}
Timing Waveform of a 2-to-1 Line Multiplexer
Timing Waveform of a 2-to-1 Line Multiplexer
Multiple Input Channels to a Single Output Channel
Can an OR gate can be used to combine different channels?
No. The problem is that channels might subdue each other
We may block a signal so that it does not subdue the other one
We may block a signal so that it does not subdue the other one
The enabling/disabling signals should be mutually exclusive. Why?
Enable Regions do not overlap so we are fine
Enable Regions overlap and this is a potential problem
Setting en = e_ch0 = e_ch1’ will give us mutually exclusive signals