Transcript IEEE C802.16m-09/0875

Proposed Tailed Biting Convolutional Codes for SFBCH
Document Number: C80216m-09/0875
Date Submitted: 2009-04-27
Source:
Changlong Xu, Hongmei Sun, Jong-Kae Fwu, Hujun Yin
Intel Corporation
Venue:
IEEE Session #61, Cairo, Egypt.
Re: TGm UL Control DG on UL Control Draft Amendment text
Base Contribution:
N/A
Purpose:
To be discussed and adopted by TGm for the 802.16m amendment.
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1
Outline
• TBCC design for SFBCH
• Performance comparison
• Complexity comparison
• Summary
2
1.
TBCC design for SFBCH
1.1 Basic parameters of proposed TBCC
•
Native code rate 1/5
– Generator polynomial
•
–
171, 133, 165, 117,127 in octal format
–
Backward compatibility for 1/2 CC in 16e
ODS
–
better performance
–
support rate matching
•
Tail-biting
•
Half complexity of Ericsson’s design
– K = 7 with 64 states in our design
– K = 8 with 128 states in Ericsson’s design
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1.2 Structure of proposed TBCC
1/5 TBCC encoder
A subblock
B subblock
C subblock
D subblock
E subblock
Subblock
interleaver
Subblock
interleaver
Subblock
interleaver
Subblock
interleaver
Subblock
interleaver
Bit selection
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TBCC encoder with rate of 1/5
A [171]
B [133]
Data in
1 bit
delay
1 bit
delay
1 bit
delay
1 bit
delay
1 bit
delay
1 bit
delay
C [165]
D [117]
E [127]
5
•
bit separation
– All of the encoded bits shall be demultiplexed into five subblocks denoted A, B, C,
D, and E. Support L information bits are input to the encoder. The encoder output
bits shall be sequentially distributed into five subblocks with the first L encoder
output bits going to the A subblock, the second L encoder output going to the B
subblock, the third L to the C subblock, the fourth L to the D subblock, the fifth L to
the E subblock.
•
subblock interleaver
– First, the table for interleaving index with length of 128 entries was
generated as follows.
– x = 1 : 128
– index = (15x+32x2)mod 128 + 1
– when the number of information bits is less than 128, the corresponding
index table can be generated by removing the entries whose values are
larger than the number of information bits.
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•
bit grouping
– The channel interleaver output sequence shall consist of the
interleaved A and B subblock sequences, followed by interleaved C, D,
and E subblock sequences.
•
bit selection
– Suppose L information bits are input to the encoder. The output
sequence of bit group consists of 5L bits denoted as d i , i  0,1,,5L
– Here we introduce one parameter called K bufsizeto indicate the size of
buffer used for repetition. Its value is less than 5L.
– If the output bits are M, the output sequence can be expressed as
c j  d j mod Kbufsize, j  0,1,, M
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1.3 Parameters for TBCC in SFBCH
•
Information bits L = 7-24bits
•
Buffer size
– 7-9 bits
K bufsize
: 30bits
– 10, 11bits : 50bit, 55bits
– 12-24 bits : 60 bits
•
Coded block size M : 60bits
8
2. Performance comparison
9
10
AWGN results for TBCC vs. block codes
•
7bits
– block codes (LG, Samsung) outperforms TBCC
– Intel’s TBCC better than Ericsson’s TBCC
•
12bits: all performance are similar
•
24bits:
– Intel’s TBCC is around 0.5dB better than Ericsson’ design @PER=0.1
– Intel’s TBCC is around 0.8dB better block codes (LG, Samsung)
@PER=0.1
•
Overall: Intel’s TBCC provides better performance over the other three
proposals
11
TBCC vs. block codes under PB3
12
13
14
PB3 results for TBCC vs. block codes
• Pilot shifting is applied
• TBCC vs. block codes @PER=0.1
– 7bits: block codes (LG, Samsung) is 0.3dB better than Intel’s TBCC,
1dB than Ericsson’s TBCC
– 12bits: all performance are similar
– 24bits: Intel’s TBCC is around 0.4dB better than the other proposals
• Overall: Intel’s TBCC is preferred
15
SFBCH@VA120
7bits: block codes (LG, Samsung) is
1 dB better than Intel’s TBCC
12bits: all performance are similar
24bits: Intel’s TBCC is 0.5dB better
than others
Overall: Intel’s TBCC is preferred
16
SFBCH@VA350
•
7bits: block codes (LG, Samsung) is 0.7 dB
better than Intel’s TBCC
•
12bits: all performance are similar
•
24bits: Intel’s TBCC is 0.3dB+ better than others
Overall: Intel’s TBCC is preferred
17
2. Complexity comparison
2.1 TBCC vs. block codes
•
Complexity of Block codes (N, K)
– Number of add
•
•
2K(N-1)
– Number of compare (real)
2k-1
– Number of compare (binary)
2KN
VA Complexity of TBCC with codeword length N, coding rate 1/R,
Constraint length L
– Number of add
N/R*2L*2*(R-1)
– Number of compare (real)
(N/R+1)*2L
– Number of compare (binary)
< N/R*2L*2*R=2N*2L
Complexity of WAVA for TBCC
– Suppose max M iteration
– Complexity will be M*complexity of VA
18
2.2 Complexity comparison between linear block and TBCC
using WAVA
Algorithm
Number of add
WAVA
M*N/R*2L*2*(R-1)
MLD
2K(N-1)
Number of compare
(real)
M*(N/R+1)*2^L
2k-1
Number of compare
(binary)
M* 2N*2L
2KN
19
Parameters for complexity comparison between MLD and WAVA
•
Parameters for MLD
– N = 60, K = 7,8,…,12
– N = 30, two block of K = 6, 7, …, 12
•
Parameters for WAVA
– N = 60, R = 5, constraint length L = 7 (128states), M = 4
– For simplification, do not consider complexity of puncturing, subblock
interleaving
– For simplification, complexity of (60,12) is used for different number of
information bits
•
Among the three kinds of operations: add, compare (real), and compare
(binary), the complexity of add is dominant. Thus, only add operator is
necessary to be compared.
20
Complexity comparison between linear block and TBCC using
WAVA
21
Comparison Results
• The average MLD decoding complexity
– 1.5 times over that of WAVA with K=8 (Ericsson)
– 3 times over that of WAVA with K=7(Intel)
•
For case of 12bits and 24bits
– 5 times over that of Ericsson’s design
– 10 times over that of Intel’s design
22
Summary
•
Proposal of TBCC for SFBCH
– Native code rate of 1/5
– Backward compatibility for ½ tbcc in 16e
• Performance Comparison
–
–
–
–
0.4 dB better than block code for 24bits
Similar performance for 12 bits
0.3 dB worst than block code for 7 bits
Always better than Ericsson’s design
• Complexity Comparison
– 1/10 of MLD for block codes with 7 bits
– 1/3 of MLD for block codes with average complexity
– Half complexity of Ericsson’s TBCC design
• Intel’s TBCC is preferred
– Better performance
– Lower complexity
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