Transcript ppt
ESE370:
Circuit-Level
Modeling, Design, and Optimization
for Digital Systems
Day 32: November 28, 2011
Inductive Noise
1
Penn ESE370 Fall2011 -- DeHon
Today
•
•
•
•
•
Inductive Responses
Calculating L
Where do inductances show up
Impact of inductance on digital circuits
How address
2
Penn ESE370 Fall2011 -- DeHon
Response
• What happens here?
3
Penn ESE370 Fall2011 -- DeHon
V2
dI
L
LC Response
V
V
dt 2
dV2
I C dt
d 2V2
CL
V
V
2
dt
Penn ESE370 Fall2011 -- DeHon
4
LC Response
V2 A Be
wt
d 2V2
CL
V
V
2
dt
5
Penn ESE370 Fall2011 -- DeHon
LC Response
V2 A Be
dV2
2
wt
w
Be
dt
wt
d 2V2
CL
V
V
2
dt
Penn ESE370 Fall2011 -- DeHon
6
LC Response
V2 A Be
wt
2
d V2
w
Be
dt
2
wt
d 2V2
CL
V
V
2
dt
CLw Be
2
wt
A Be
wt
V
7
Penn ESE370 Fall2011 -- DeHon
LC Response
CLw Be
2
V A
Penn ESE370 Fall2011 -- DeHon
wt
A Be
wt
V
CLw 1 0
2
1
w i
CL
8
LC Response
V A
V2 A Be
V2 V Be
wt
1
w i
CL
1
i
t
CL
d 2V2
CL
V
V
2
dt
Penn ESE370 Fall2011 -- DeHon
9
LC Response
i
e cos( ) isin( )
V2 V Be
1
i
t
CL
10
Penn ESE370 Fall2011 -- DeHon
LC Response
i
V2 V Be
1
t
CL
11
Penn ESE370 Fall2011 -- DeHon
Response?
12
Penn ESE370 Fall2011 -- DeHon
V2
RLC Response
L dI dt IR V2 V
dV2
I C dt
d 2V2
dV2
V2 V
CL
RC
dt
dt
13
Penn ESE370 Fall2011 -- DeHon
RLC Response
V2 A Be
wt
dV2
2
wBe
dt
d V2
wt
w
Be
dt
2
wt
d 2V2
dV2
V2 V
CL
RC
dt
dt
Penn ESE370 Fall2011 -- DeHon
14
RLC Response
dV2
V2 A Be
wt
2
d V2
wBe
dt
wt
w
Be
dt
2
wt
d 2V2
dV
RC 2 V V
CL
2
dt
dt
CLw Be
2
wt
wt
wt
RC wBe A Be V
15
Penn ESE370 Fall2011 -- DeHon
Solving for w
CLw Be
2
RC wBe A Be
CLw RC w 1 0
wt
wt
wt
V
2
R
1
w w
0
L
LC
2
Penn ESE370 Fall2011 -- DeHon
16
RLC
R
R
4
L LC
L
w
2
2
R
1
w w
0
L
LC
2
17
Penn ESE370 Fall2011 -- DeHon
RLC
R
R
4
L LC
L
w
2
2
V2 A Be
wt
18
Penn ESE370 Fall2011 -- DeHon
RLC
• For
R
R
4
L LC
L
w
2
2
V2 A Be
4L
R
C
• Oscillation
• Decay
wt
19
Penn ESE370 Fall2011 -- DeHon
RLC Response (R=100)
20
Penn ESE370 Fall2011 -- DeHon
When Oscillate
4L
R
C
4L
200
C
21
Penn ESE370 Fall2011 -- DeHon
RLC Response
22
Penn ESE370 Fall2011 -- DeHon
Inductance of Wire
23
Penn ESE370 Fall2011 -- DeHon
Inductance:
Wire over Ground Plane
0 r h
L l
w
• Inductance per cm with h=3mil, w=5mil?
24
Penn ESE370 Fall2011 -- DeHon
Lwire
CL
C and L per unit length
L
Penn ESE370 Fall2011 -- DeHon
C
25
Chip Inductance
• Cwire = 0.16 pF for the 1mm)
• Cwire = 0.16nF/m
• Permeability 0≈ Si02=12.6×10-7H/m
• Permitivity ox=3.5×10-11F/m
L
Penn ESE370 Fall2011 -- DeHon
C
26
On Chip
• Cwire = 0.16 pF for the 1mm)
• Cwire = 0.16nF/m
• Permeability 0≈ Si02=12.6×10-7H/m
• Permitivity ox=3.5×10-11F/m
276pH (for 1 mm)
L
Penn ESE370 Fall2011 -- DeHon
C
27
Comparisons
• 5mil trace on PCB
• Protoboard wires (0.6mm diameter)
– About 7nH/cm
– http://www.consultrsr.com/resources/eis/induct5.htm
• On chip wire
– 0.28nH/mm = 2.8nH/cm
28
Penn ESE370 Fall2011 -- DeHon
Inductors
•
•
•
•
Bond pads
Chip leads
Long wire runs
Cables
Src: http://en.wikipedia.org/wiki/File:Wirebonding2.svg
29
Penn ESE370 Fall2011 -- DeHon
Where Arise
30
Penn ESE370 Fall2011 -- DeHon
Signal Path
31
Penn ESE370 Fall2011 -- DeHon
Power Ground
32
Penn ESE370 Fall2011 -- DeHon
Shared Power/Ground
Example: 74x04
33
Penn ESE370 Fall2011 -- DeHon
Estimate
• Req, Ceq for gates in parallel
– R0 = 25K W
– C0 = 0.01 fF
• say 10C0=0.1fF for typical load
• 250 gates switching at clock
• Req = 100WCeq=25fF
• Assume L=1nH
34
Penn ESE370 Fall2011 -- DeHon
Power Ground
35
Penn ESE370 Fall2011 -- DeHon
RLC Response
36
Penn ESE370 Fall2011 -- DeHon
Today’s Chips
• How many gates?
37
Penn ESE370 Fall2011 -- DeHon
Multiple Power/Ground Pins
• Use many power/ground pins
• How many pins on a package?
• Divide switching gates by pins
– To get effective load on each pin
38
Penn ESE370 Fall2011 -- DeHon
How Improve
39
Penn ESE370 Fall2011 -- DeHon
Minimize the L
• Make wires short
• Use power and ground planes
40
Penn ESE370 Fall2011 -- DeHon
Add Good C’s
• Bypass Capacitors – inside the
inductances
– On board
– On package
– On chip
41
Penn ESE370 Fall2011 -- DeHon
Bypass Capacitor Example
42
Penn ESE370 Fall2011 -- DeHon
Bypassed Supplies (@ transistor)
43
Penn ESE370 Fall2011 -- DeHon
Bypassed Output
44
Penn ESE370 Fall2011 -- DeHon
Minimize Current Draw
• More Power/Ground Pins
• Slower rise/fall times
• Spread out switching
45
Penn ESE370 Fall2011 -- DeHon
Admin
•
•
•
•
HW6 out
Project 3 out
Wednesday Lecture
Friday in Lab
– Lab instructions out Wednesday
46
Penn ESE370 Fall2011 -- DeHon
Idea
• Long wires are inductive
– Avoid them
– Especially on power supplies
• Bypass capacitors help
47
Penn ESE370 Fall2011 -- DeHon