Transcript DAQ/EGSE Hardware

GLAST LAT Project
Gamma-ray Large
Area Space
Telescope
4.1.7
GLAST Large Area Telescope:
Electronics, Data Acquisition &
Flight Software W.B.S 4.1.7
Monthly Status 11-02-04
Gunther Haller
[email protected]
(650) 926-4257
G. Haller
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GLAST LAT Project
4.1.7
Test-Stand Summary
Client
Calorimeter (conformal)
Calorimeter
Tracker (conformal)
Tracker
ACD
I & T* (next slide)
DAQ/FSW
Electronics Support
Total
•
•
•
•
Shipped Assemble/Test
11
3 TEM
5
0
2
0
9
0
4
0
5
0
12
0
11
0
59
3
Total
14
5
2
9
4
5
12
11
62
Finished TKR test-stands
ACD was already finished
Produced and shipped 3 more CAL FM TEM/TPS including conformal
coating/stacking
Tested 3 more TEM/TPS sets for CAL, in conformal coating, to be
shipped in about 2 weeks
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GLAST LAT Project
4.1.7
Test-Stand Maintenance
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TKR Returns
– None
ACD Returns
– None
CAL Returns
– One TEM, FPGA failure during muon testing at NRL, replaced
FPGA
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GLAST LAT Project
4.1.7
ACD Teststand
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Last months issue: Issue with high-rate testing -> CPU crashes ->
GASU needs to be power-cycled
Mitigation provided last month:
– DAQ/I&T sent ACD instruction on how to reset GASU after CPU
crash so that GASU does not need to be power-cycled.
– ACD was to either
• Change code to process all events off-line (transmit from CPU
to PC instead of process them in the CPU), or
• Change code to process only fraction of events real-time in
CPU (prescaling)
– Testing could also continue by
• First look at rate-counters to confirm that rates are not high
• If rates are low, one can take data, if rates are high, there is a
problem anyways
Final Mitigation (DAQ/I&T team sent to GSFC today to install)
• 4 each LCB’s with updated FPGA code
• New revision I&T release (back-ward compatible, transparent)
This will fix crashes, but in order to do high rate processing, ACD
code still needed to change code as described above (see ACD)
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GLAST LAT Project
4.1.7
ASIC
• All GTCC1, GCCC1 TEM ASIC’s screened
– Qualification testing at GSFC is starting
– SLAC personnel will help Thursday to get station up
running at GSFC
• GLTC ASIC’s (for GASU)
– Thermal cycled GLTC’s
– Screening hardware debugged, working
– Test software in progress
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GLAST LAT Project
4.1.7
ACTEL
• Returned all MEC fab-line FPGA’s to ACTEL with exception of
already programmed (e.g. for qual, Twr A, Twr B)
• Scheduled to receive UMC fab-line ACTELs tomorrow at SLAC
• 3 sets will be programmed at SLAC by ACTEL (will bring their
programming adapter)
• Then 3 sets will go to lead-forming (1-2 weeks)
• Decision was to be made: rework 3 assembled TEM’s or put
MEC’s on them, but see TEM production issues…
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GLAST LAT Project
4.1.7
TEM/TPS Production
•
Delays at General Dynamics (technical & priority)
– Issue with Nusil under ASICs: ASIC lifted up in reflow oven, issue with air
pockets
• Experiments did not succeed
• SLAC analyzed temperature increase for flight by not applying Nusil
under ASIC
– 3 degrees T difference
– SLAC changed work-order to not apply Nusil under ASIC
– Issue with Nusil under ACTEL
• Required for thermal reasons
• Tests to solder with hot-air rework station failed, did not get to reflow
temp
– After 10 days found out that station was defective
• Now fixed and works
• Assembly in reflow oven was reported to work too since ACTELs are
bigger and heavier than ASICs (used samples of ACTELs)
– Latest (yesterday): GT reports that pins on all ACTEL’s are bent and can’t
be used. ACTEL’s were received at GT 6 weeks ago. Being investigated
how this can happen. ACTEL’s are being sent back to SLAC.
– Investigate whether pins can be straightened, or
– Wait til UMC line is available (2 weeks)
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GLAST LAT Project
4.1.7
TEM/TPS Schedule Qual, TWR-A, TWR-B
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Near term schedule supplied by GT (BEFORE THEY TOLD US
YESTERDAY THAT FPGA’s CAN’T BE USED!)
– TPS complete with SMT (done)
– TEM complete with SMT (done)
– TPS QA (in progress)
– TEM QA
– MECH ASSY TEM and TPS HEATSINK, ATTACH VR5 11/4
– TEM and TPS QA
– TEM and TPS thru hole
– TEM and TPS QA
– TEM and TPS SPEA
– TEM and TPS install cable assys, aqueous clean
– TEM and TPS staking
– TEM and TPS QA
– TEM AND TPS AVAILABLE FOR SLAC PERSONNEL
TC/Temp test/review
Mating of TEM/TSP, test, vibration, TC, ship to SLAC
TVAC, EMI, deliver to I&T
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11/1
11/2
11/2
11/3
11/5
11/8
11/9
11/11
11/15
11/16
11/17
11/18
12/13
12/31
01/17
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GLAST LAT Project
4.1.7
TEM/TPS
• Tasks left to be completed
– Delivery/review of detailed vibration/TC procedure from GT
– Travel of 3 engineers to GT (2 days before boards are
available for testing)
– EMI SOW released, received quote for EMI testing at
vendor, is going out for RFP next week.
• Schedule risk mitigation efforts in process
– Daily telecon with vendor
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GLAST LAT Project
4.1.7
GASU & GASU-PS & PDU
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Internal harness for GASU, PDU, SIU
– SOW’s and Drawings released
– Requisition written
– Will go to purchasing for RFP cycle
PDU
– Enclosure contract awarded, 6 week delivery
– Flight PCB’s in fabrication, due 11/10/04
• Will assembly one board in-house and test
– SOW for flight assembly just released
– Requisition being entered in system
– Issue: OMNIREL linear-regulator. Recalled lot which was received by SLAC. (Tantalum
cap used has end-termination with pure Sn as opposed to Sn/Pb. Can’t use in space.)
New delivery in Feb 05.
– Preliminary detailed schedule shows PDU QUAL&FLT delivered to SLAC 3/15 and
delivery to I&T 3/30
GASU
– Enclosure contract awarded, 8 week delivery
– Flight electrical package just signed off
– PCB fab requisition created
– Assembly drawings in sign-off cycle
– SOW for assembly approved
– Requisition for assembly awaits approval of drawings
– Issue: might have to add LVDS driver on PCB -> see EEPROM slide
– Same schedule as PDU
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GLAST LAT Project
4.1.7
SIU & LAT Harness
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SIU
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Enclosure fab awarded, 8 week delivery
LCB, CPS, Back-plane electrical in sign-off
Requisition for flight PCB fab await sign-off of drawings
SIB board layout was changed (power-on reset mod due to occasional
EEPROM addr 0 corruption. Was changed on EM’s, is working
• Assume that 28 mil finished minimum hole size for PCI connector is
accepted (32 drill plated to 28 mil). Larger holes up to 32 mil are also
ok.
– SIB electrical will be submitted for sign-off after above is final
– Parts: PCI ERNI Connector not approved yet (need screening
specifications)
– Crate assembly drawings in sign-off
– SOW for board, crate assembly to be written
• Question of sending RAD750 board to board assembly vendor and
testing of entire crate at vendor, versus having boards done
individually at vendor and assembly and test in crate at SLAC
LAT Harness
– Connectors were ordered and have been received at SLAC
– Drawings in sign-off
– SOW in sign-off
– Requisition awaits sign-off of above items
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GLAST LAT Project
4.1.7
RAD750 EEPROM/PROM
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Issue: possible risk of page fault in EEPROM (is it?, not clear)
Last week: Authorized BAE to order PROM assembly tool (2 week
delivery)
Options:
– Replace EEPROM with PROM
– No change: keep one boot image in EEPROM
– Keep EEPROM but minimize (~4 kBytes) critical single-copy code
and have two images of bulk of code (~60kbytes each)
• Detect/control via checksum
– About 4 weeks code development & test
– Potential problem with failures due to large number of repeated
reads of EEPROM (is it problem?, not clear)
– But then also (smaller) problem in current boots since loop (wait)
run out of EEPROM
•
• Use PID’s via SC discretes in SIU and (to be added) discrete
from GASU for EPU
• Easier coding, would require board change of GASU and some
cable mod
Another telecon Friday to discuss
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GLAST LAT Project
4.1.7
Schedule/Budget
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Total budget: $22,055
Work Scheduled up to date: $20,509
Work Performed: $18,121
Actuals: $19,832
Schedule Variance $-2,388k (-11.6%)
– Qual/Flight work should have been started, reflects current
status
• Cost Variance: $-1,710k (-8.3%)
• Mainly EGSE, GASU, PDU are over budget
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