Transcript Presentation 4/26/07

POWER ANALYSIS
Sai Siddharth Kumar Dantu
Advisor: Dr. V Agrawal
ELEC7770 Advanced VLSI Design Team Project
Objective
To perform the power analysis of a 32 bit
processor.
Power components in CMOS circuit
Ron
Dynamic power
Leakage power
VDD
vi (t)
vo(t)
Short circuit power
R=large
Ground
Power = CVDD2
CL
Components of Power
Dynamic
– Signal transitions
Logic activity
Glitches
Short-circuit
Static
– Leakage
Ptotal =
Pstat
Pdyn + Pstat
Ptran + Psc +
What I have done so far
Used Jins’s tool to evaluate the power of
the ALU block of the processor.
Clock period applied is 20ns
Random vectors applied are 1000
Results
Minimum leakage power observed :
33438pW
Maximum leakage power observed :
37304pW
Minimum dynamic power observed :
73.67μW
Maximum dynamic power observed :
275.33μW
Average dynamic power 154.7 μW
Avg short circuit power
32.94 μW
Average leakage power
3526.13 pW
Total average power
187.69 μW
Maximum total power
338.63 μW
Results
Percentage of dynamic power present in
the total average power is 82.42%
Percentage of leakage power is 0.01878%
Percentage of short circuit power is
17.55%.
Work still to be done
The power analysis of the entire processor
has to be done.
THANK YOU