Transcript LARP@LBL 060426 frm talk2.ppt

The Commissioning of the Technical
Systems of LHC
1.
The final validation that all the collider
components/systems perform as specified.
2. All the tests are performed without beam.
3. The sectors under test are fully installed but
installation is going on in other sectors.
4. Also, tests are going on in other sectors.
Félix Rodríguez-Mateos, CERN-TS
LARP Collaboration Meeting @LBL, April 26th 2006
individual system tests
the mandate

After the qualification for
operation of the individual
systems of a sector (vacuum,
cryogenics, quench protection,
interlocks, powering, etc.),
operation
& controls
groups
beam
transfer
hardware commissioning


commissioning
coordination
collimators
quench
each sector will be
protection
commissioned as a whole up to
the powering to nominal current
equipment
of all the circuits.
groups
cryogenics
rf
instrumentation
magnet
Validation and specific
studies will be carried-out on the
interlocks
first commissioned sector.
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cooling &
ventilation
infrastructure
groups
access
control
& safety
electricity
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the logic
Sytem owners
define and carry-out
Hardware Commissioning
Coordination with System Owners
define and carry-out
individual
system tests
hardware
commissioning
subsystems ready
Short
Circuit
Tests
all systems ready
for
machine check out
RF
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Collimator
System
Injection
System
Superconducting
Circuits
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preparation
the scope
all the accelerator systems in the LHC tunnel with particular
emphasis to superconducting circuits
individual system tests
commissioning
failure scenarios
x 65
documentation
the program
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the schedule
the manpower
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preparation : software
 QPS
 Power Converters
 Powering Interlock
sacec : software applications for the
commissioning of the electrical circuits
procedures
AT/MEL
commissioning scenario
x 15
AB/PO
AT/ACR
AB/CO
AB/CO
requirements
HCC
prototypes
Documents on PMA tools
requirements being prepared
at present
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the number of simultaneous work fronts
front = instance of the sequencer running
FCR2
UJ or RR
CCC
1 SCT
1 SCT
August 2006
February 2007
2 PT
2 PT
2 PT
2 PT
2 PT
1 SCT
1 SCT
2 PT
1 SCT
1 SCT
2 PT + 1 SCT
2 PT + 2 PT + 1 SCT
2 PT = powering tests in two adjacent sectors
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9 fronts 5 fronts 1 front
FCR1
1 SCT
1 SCT = short circuit tests of one powering area
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the as designed documentation
specifies the objective of the
test and either describes each
step or summarizes the test
procedure
defines the pre-requisites to
start the tests in terms of
conditions and availability of
systems
subsystems ready
all systems ready for
machine check out
describes in what conditions
the system should be
delivered to the next step
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EDMS
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HCP in circulation for engineering check
LHC-D-HCP-0004
The Commissioning of the Inner Triplet
Region
Esther Barbero Soto
Davide Bozzini
Paul Cruikshank
Reiner Denz
Bruno Puccio
Félix Rodríguez Mateos
Rüdiger Schmidt
Luigi Serio
Hugues Thiesen
Markus Zerlauth
This document describes the sequence of the steps
which lead to the commissioning of the complete
inner triplet. It gives the backbone of the general
procedures and refers to more detailed documents
associated to the different systems, which in turn
describe the individual system tests and the
hardware commissioning procedures.
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the as tested documentation
contains the sequence of the tests
includes the data gathered during the tests
describes the eventual non conformities
subsystems ready
all systems ready for
machine check out
MTF
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the sequence
2
PX46
PZ45
Point 5
PM45
3
PX56
PM54
TX46
UJ43
UJ46
UX45
UJ44
RA43
UD62
UL56
USC55
UW45
TU56
UJ561
TD68
PZ65
PM65
RE58
RE62
UP62
CMS
Point 4
RE38
PX64
RR57
UXC55
RE42
PZ 33
Point 6
UJ57
RR53
US45
UA43
PM56
UJ56
RE52
UA47
UL46
RZ33
UJ53
UP53
RZ54
RE48
UL44
Point 3.3
RA47
UJ47
RA63
UJ62
TX64
UJ63
UA63
UX65
UJ64
UJ33
UJ32
UJ66
UL64
RA67
UL66
UW65 US65
PM32
UA67
UJ67
UJ68
TD68
TZ32
Point 3.2
UD68
UP68
RE68
4
RE28
UJ27
Point 7
PGC2
RA27
PM25
UL24
UJ26
Point 2
US25
PX24
PM76
1
UA27
UJ76
UL26
Point 8
SPS
UJ23
Point 1.8
RA23
RH23
RE78
PM85
UA23
UJ24
RR73
TZ76
UW25
UX25
ALICE
RE72
RE22
UJ22
PM18
P M I2
RE18
Point 1
PX15
US15
UJ18
UL14
TI 2
UJ14
RT18
PZ85
UL86
UA87
TI 8
UJ13
RR13
RE12
UJ87
UL84
UX15
USA15
TI12
UJ12
RT12
RA83
UJ84
RE88
RH87
UJ16
UJ83
UJ88
RA87
TI18
UA83
US85
TJ 8
PX14
RR17 UJ17 UL16
PX84
LSS4
PM15
PX16
RE82
UW85
PGC8
RR77
UJ86
TX84
UX85
LHCb
ATLAS
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personnel underground
resources deployed for the powering tests
two shifts = 15 hour days
Left
Front 2
Right
Front 1
Front 1
Front 2
6.6 km
in the field
on call
cryogenics operation
cryogenics instrumentation
quench protection
machine interlocks
o
power converters
x
coordination
e
controls
t
operation
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operator
expert
engineer
technician
Front 1 arc and the
matching section on
the even side
Front 2 arc, the matching
section on the odd
side and the inner
triplets on both sides
22 present in the field
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the sequence of tests around an even point
Powering Tests
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the field
Point 7
field control room
PM76
RR73
TZ76
UJ76
Point 8
SPS
RE78
PM85
Point 1
PX16
PX15
US15
UL14
RR17 UJ17 UL16
UJ14
UA87
TI 8
UJ13
RR13
RE12
UJ87
UX15
TI12
UJ84
RE88
UJ86
TX84
UX85
LHCb
UJ12
USA15
RA83
UJ88
RH87
UJ16
UJ83
UL84
RA87
TI18
UA83
US85
TJ 8
PX14
UJ18
PX84
PZ85
UL86
LSS4
PM15
RE82
UW85
PGC8
RR77
RT12
ATLAS
minor control centres
arc and even matching section
inner triplets and odd matching section
warm magnets
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~210
190
~10
cold circuits
orbit corrector circuits
warm circuits
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the field control room
UA 83 – Left of Point 8
DFBs
Power
Converters
Energy
Extraction
Systems
cryogenics
+ wi-fi coverage of the UA
+ printer
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Field control room
powering tests
+ desks
+ meeting table
+ lockable closets
interlocks
post-mortem
+ social corner
+ water fountain
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the first commissioning
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the phases
W:SCT
short circuit tests
W:LT
leak test
W: PT
pressure test
W:ISTs
all sorts of system tests at warm
W:ELQA electrical quality assurance at warm
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CD:1
cool down from 300 to 80 K
CD:2
cool down from 80 to 4.5 K
CD:3
cool down from 4.5 to 1.9 K
C:ELQA
electrical quality assurance at cold
C:ISTs
system tests at cold
C:PT
powering tests
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Power Converters
not connected to Magnets
superconducting magnet circuits
Test of power converters
connected to the DC
cables in short circuit,
including controls for
powering, ramp,
monitoring
Individual System Tests of
Powering Interlock Control
Individual System Tests of the
Quench Protection and
Energy Extraction Systems
90 K
Electrical Quality
Assurance
1.9 K
Post-Mortem
System tests
Interlock tests of a powering subsector
Power Converters
connected to Magnets
300 K
prior and after connection of the power
cables to the DFB leads
connexion of power cables
to the current leads
Commissioning of the electrical circuits one by one or in
groups at low, intermediate and nominal currents
Commissioning of all the electrical circuits of the sector powered in
unison to nominal current with nominal ramp rates
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powering of the superconducting magnet circuits
1/2
HCA:PIC2
Stand-by current


HCA:PLI1
HCA:PLI2
HCA:PLI3
HCA:PLI4




Injection level
20% of Inom
50% of Inom
80% of Inom






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to commission the protection functionalities of the
powering interlock controllers and all its connected
systems with current through the circuits
to verify the compatibility of the switch-on and
switch-off processes of the converters with the
sensitivity of the protection systems (namely QPS)
to set up the power converter current loops
to verify the cooling control of the current leads
to validate the protection mechanisms under real
powering conditions and with limited amount of
energy in the circuits
to validate quench-related procedures, e.g.
cryogenic recovery procedures
to validate the sensitivity and compatibility during
ramps of the systems susceptible to noise pick-up,
couplings, etc
to perform a last check on the polarities of the
circuits by verifying voltages across current leads (at
low current using QPS signals)
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powering of the superconducting magnet circuits
2/2
HCA:PNO

Nominal current






HCA:PAC
Nominal current
(all circuits of a
sector)
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


to verify that the power converters work correctly
during the ramp of the current
to verify the cooling control of the current leads
to calibrate the DCCTs for the main power
converters and the Inner Triplet power converters
and to verify that the calibration systems work
correctly
to validate the protection mechanisms under real
powering conditions and with nominal energy in the
circuits
to verify the quench current level of each circuit
to validate quench-related procedures, e.g.
cryogenic recovery procedures
to verify the tracking of the current
to verify thermal performance of the ventilation and
water cooling systems in underground areas
to have a 24-h reliability run in order to detect
premature failures due to wrong settings or possible
assembly errors
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HCP in circulation for approval
LHC-D-HCP-0003
Powering of the Superconducting
Circuits of a Sector up to Nominal
Current
Amalia Ballarino, Davide Bozzini
Knud Dahlerup-Petersen
Reiner Denz, Robin Lauckner
Bruno Puccio, Félix Rodríguez-Mateos
Roberto Saban, Rüdiger Schmidt
Luigi Serio, Hugues Thiesen
Antonio Vergara, Markus Zerlauth
This document describes the sequence of the steps
which lead to the powering of the superconducting
circuits of a powering sub-sector to nominal current.
It covers the phases after the connection of the
power cables to the current leads up to the
powering in unison of all the circuits of a sector to
nominal current.
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failure scenarios
 failure scenarios during the commissioning
failure
were studied
 the objective was to define strategies for at
least a few case studies per major system in
order to gain in reactivity at the time of failures
can it be
circumvented
 evaluate the impact on the program and
yes
 define alternatives to carry-on
 six sessions of the HCWG were devoted to this
study:
do it
according
to defined
procedures
apply
diagnostic
protocols
 Superconducting Electrical Circuits
 Cooling and Ventilation System
 Cryogenic System
yes
 Vacuum System & Leak Tests
clear
diagnostic
 Electrical Power Distribution
 Power Interlock Controllers
decision
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crash
programme
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HCP in circulation for engineering check
LHC-D-HCP-0006
Failure Scenarios for the Electrical
Circuits
Davide Bozzini
Reiner Denz
Knud Dahlerup-Petersen
Hugues Thiesen
Antonio Vergara
Markus Zerlauth
This document describes the failure scenarios for the
Electrical Circuits which are relevant during the
Hardware Commissioning. The objective is to
identify show stoppers and define the strategies to
repair, recover or do with them.
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Thanks for your attention…
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