1999 IEEE Symposium on Indium Phosphide & Related Materials Transferred-Substrate Heterojunction Bipolar Transistor Integrated Circuit Technology M Rodwell , Q Lee, D Mensa, J.
Download ReportTranscript 1999 IEEE Symposium on Indium Phosphide & Related Materials Transferred-Substrate Heterojunction Bipolar Transistor Integrated Circuit Technology M Rodwell , Q Lee, D Mensa, J.
1999 IEEE Symposium on Indium Phosphide & Related Materials Transferred-Substrate Heterojunction Bipolar Transistor Integrated Circuit Technology M Rodwell , Q Lee, D Mensa, J Guthrie, Y Betser, S Jaganathan, T Mathew, P Krishnan, S Long University of California, Santa Barbara SC Martin, RP Smith, NASA Jet Propulsion Labs Supported by ONR (M Yoder, J Zolper, D Van Vechten), AFOSR ( H Schlossberg ) Why are HEMTs smaller & faster than HBTs ? FETs have deep submicron dimensions. 0.1 µm HEMTs with 400 GHz bandwidths (satellites). 5 million 1/4-µm MOSFETs on a 200 MHz, $500 CPU. FET lateral scaling decreases transit times. FET bandwidths then increase. HBTs have ~1 µm junctions. vertical scaling decreases electron transit times. vertical scaling increases RC charging times. lateral scaling should decrease RC charging times. HBT & RTD bandwidths should then increase. But, HBTs must first be modified . . . Scaling for THz device bandwidths Current-gain cutoff frequency in HBTs kT 1 kT base collector C je Cbc Rex Rcoll 2f qIE qIE base Tb2 2Dn collector Tc 2vsat Collector velocities can be high: velocity overshoot in InGaAs Base bandgap grading reduces transit time substantially RC terms quite important for > 200 GHz ft devices Excess Collector-Base Capacitance in Mesa HBTs • base contacts: must be > 1 transfer length (0.3 mm) sets minimum collector width sets minimum collector capacitance Ccb • base resistance spreading resistance scales with emitter scaling contact resistance independent of emitter scaling sets minimum base resistance sets minimum RbbCcb time constant fmax does not improve with submicron scaling Transferred-Substrate HBTs: A Scalable HBT Technology 1000 f max , GHz 800 600 0.5 mm base Ohmics 400 1.0 mm base Ohmics 200 0 0 0.5 1 emitter w idth, microns • Collector capacitance reduces with scaling: Ccb We • Bandwidth increases rapidly with scaling: f max 1 We 1.5 Thinning base, collector epitaxial layers improves ft, degrades fmax Lateral scaling provides moderate improvements in fmax Regrowth (similar to Si BJT !) should help considerably Transferred-substrate helps dramatically Integrated Circuit Technology transistor resistor capacitor microstrip bypass capacitor C B E BCB gold thermal via ground via gold ground plane In/Pb/Ag solder GaAs carrier wafer metal 1 polyimide metal 2 SiN NiCr contact • very high HBT bandwidths, low interconnect capacitance, low ground-return inductance, low thermal resistance 50 mm transferred-substrate HBT Wafer: Cu substrate AlInAs/GaInAs graded base HBT 0.5 Emitter Collector depletion region 0 -0.5 -1 Schottky collector Graded base -1.5 -2 0 1000 2000 3000 4000 Distance, Å 5000 6000 Band diagram under normal operating voltages V ce = 0.9 V, V be= 0.7 V • 400 Å 5E19 graded base ( DEg = 2kT), 3000 Å collector Transferred-Substrate Heterojunction Bipolar Transistor Device with 0.6 µm emitter & 1.8 µm collector extrapolated fmax at instrument limits, >400 GHz 35 Mason's Gain, U 30 Gains, dB 25 20 H 15 f 21 max =470 GHz (?) 10 5 f =215 GHz 0 1 10 100 Frequency, GHz 0.25 µm devices should obtain >1000 GHz fmax Submicron Transferred-Substrate HBT 25 Gains, dB 20 Mason's gain, U 15 MSG, common base 10 MSG, common emitter 5 H , common emitter f max = 820 GHz 21 0 100 Frequency. GHz 0.4 mm x 6 mm emitter, 0.4 mm x 10 mm collector 1000 Emitter Profile: Stepper Device 0.5 mm emitter stripe 0.15 mm e/b junction Transferred-Substrate HBT: Stepper Lithography 30 Gains, dB 25 Mason's gain, U 20 15 10 H 21 f = 147 GHz f max = 805 GHz 5 0 100 Frequency, GHz 0.4 mm emitter, ~0.7 mm collector 1000 DC characteristics, stepper device We=0.2 X 6 mm2 Wc=1.5 X 9 mm2 b=50 Given high fmax, vertical scaling exhanges reduced fmax for increased f Transit times: HBT with 2kT base grading 1.2 0.8 b c 0.41 ps RexCcb 0.114 ps 1/2f (ps) 1 0.6 C je g m 0.065 ps 0.51 ps 0.4 Ccb g m 0.045 ps f 252GHz 0.2 total 0.634 ps 0 0 0.1 0.2 0.3 0.4 1/I (1/mA) c 2000 Å InGaAs collector 400 Å InGaAs base, 2kT bandgap grading 0.5 0.6 Why would you want a 1 THz transistor ? Digital microwave / RF transmitters (DC-20 GHz) direct digital synthesis at microwave bandwidths microwave digital-analog converters Digital microwave / RF receivers delta-sigma ADCs with 10-30 GHz sample rates 16 effective bits at 100 MHz signal bandwidth ? Basic Science: 0.1 µm Ebeam device: 1000 GHz transistor (?) transistor electronics in the far-infrared Fast fiber optics, fast digital communications: 200 GHz f, 500 GHz fmax device: ~ 75-90 Gb/s 160 Gb/s needs ~350 GHz f, 500 GHz fmax Transferred-Substrate HBT ICs: Key Features 100 GHz clock-rate ICs will need: very fast transistors short wires –> high IC density –> high thermal conductivity low capacitance wiring low ground inductance –> microstrip wiring environment Transferred Substrate HBT ICs offer: 800 GHz fmax now , > 1000 GHz with further scaling 250 GHz ft now, >300 GHz with improved emitter Ohmics copper substrates / thermal vias for heatsinking low capacitance (= 2.5) wiring THz-Bandwidth HBTs ??? deep submicron transferred-substrate regrown-base HBT 4 5 2 1 3 1) regrown P+++ InGaAs extrinsic base --> ultra-low-resistance 2) 0.05 µm wide emitter --> ultra low base spreading resistance 3) 0.05 µm wide collector --> ultra low collector capacitance 4) 100 Å, carbon-doped graded base --> 0.05 ps transit time 5) 1kÅ thick InP collector --> 0.1 ps transit time. Projected Performance: Transistor with 500 GHz ft, 1500 GHz fmax The wiring environment for 100 GHz logic Why is Improved Wiring Essential? ground return loops create inductance Wire bond creates ground bounce between IC & package 30 GHz M/S D-FF in UCSB - mesa HBT technology Ground loops & wire bonds: degrade circuit & packaged IC performance Ground Bound Noise in ADCs ADC digital sections input buffer Lground ground bounce noise D Vin ground return currents Ground bounce noise must be ~100 dB below full-scale input Differential input will partly suppress ground noise coupling ~ 30 to 40 dB common-mode rejection feasible CMRR insufficient to obtain 100 dB SNR Eliminate ground bounce noise by good IC grounding Microstrip IC wiring to Eliminate Ground Bounce Noise Brass carrier and assembly ground IC with backside ground plane & vias interconnect substrate near-zero ground-ground inductance IC vias eliminate on-wafer ground loops Transferred-substrate HBT process provides vias & ground plane. Power Density in 100 GHz logic Transistors tightly packed to minimize delays 105 W/cm2 HBT junction power density. ~103 W/cm2 power density on-chip 75 C temperature rise in 500 mm substrate. Solutions: Thin substrate to < 100 mm Replace semiconductor with metal copper substrate Transferred-Substrate HBT Integrated Circuits 11 dB, 50+ GHz AGC / limiting amplifier 47 GHz master-slave flip-flop 10 dB, 50+ GHz feedback amplifier 7 dB, 5-80 GHz distributed amplifier Transferred-Substrate HBT Integrated Circuits multiplexer 2:1 demultiplexer (120 HBTs) 16 dB, DC-60 GHz amplifier 6.7 dB, DC-85 GHz amplifier W-band VCO Clock recovery PLL Darlington Amplifier - 360 GHz GBW 20 15 S 21 dB 10 5 0 S -5 -10 11 S 22 -15 0 20 40 60 Frequency, GHz 80 • 15.6 dB DC gain • Interpolated 3dB bandwidth of 60 GHz • 360 GHz gain-bandwidth product 100 6.7 dB, 85 GHz Mirror Darlington Amplifier 8 21 Forward Gain, S , dB 10 6 4 2 0 0 20 40 60 Frequency, GHz 80 • 6.7 dB DC gain • 3 dB bandwidth of 85 GHz • f-doubler (mirror Darlington) configuration 100 Master-Slave Flip-Flops CML: 47 GHz ECL: 48 GHz 66 GHz Static Frequency Divider in Transferred-substrate HBT Technology Q. Lee, D. Mensa, J. Guthrie, S. Jaganathan, T. Mathew, Y. Betser, S. Krishnan, S. Ceran, M.J.W. Rodwell University of California, Santa Barbara IEEE RFIC’99, Anaheim, California Fiber Optic ICs PIN / transimpedance amplifier (not yet working !) AGC / limiting amplifier CML decision circuit Delta-Sigma ADC In Development (300 HBTs) Transferred Substrate HBTs An ultrafast bipolar integrated circuit technology Ultrahigh fmax HBTs Low capacitance interconnects Superior heat sinking, low parasitic packaging Demonstrated: HBTs with fmax > 800 GHz fast flip-flops, 85 GHz amplifiers, ... Future: 0.1 mm HBTs with fmax > 1000 GHz 100 GHz digital logic ICs --> DACs, DDS, ADCs, fiber