ECE 5465 Advanced Microcomputers Group 11: Brian Knight Benjamin Moore Alex Williams Outline  Review Basic Data Processing Instructions       Arithmetic, Bit-wise, Movement, Comparison Instructions ADC, SBC, and RSB Operand2 Multiply Instructions Immediate Values Binary.

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Transcript ECE 5465 Advanced Microcomputers Group 11: Brian Knight Benjamin Moore Alex Williams Outline  Review Basic Data Processing Instructions       Arithmetic, Bit-wise, Movement, Comparison Instructions ADC, SBC, and RSB Operand2 Multiply Instructions Immediate Values Binary.

ECE 5465
Advanced Microcomputers
Group 11:
Brian Knight
Benjamin Moore
Alex Williams
1
Outline

Review Basic Data Processing Instructions
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
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
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Arithmetic, Bit-wise, Movement, Comparison
Instructions
ADC, SBC, and RSB
Operand2
Multiply Instructions
Immediate Values
Binary Encoding
2
Review Data Processing Instructions
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Arm data processing instructions 
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Perform arithmetic operations
Perform logical operations
Operate on data values in Registers
The only instructions that modify data values
Typically require two operands and produce
single result
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Arithmetic & Bit-wise Operations
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op{cond}{S} Rd, Rn, Operand2, where
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op: ADD, SUB, RSB, ADC, SBC, RSC, AND, ORR,
EOR, or BIC
cond: optional condition code
S: optional suffix that causes condition codes to be
updated
Rd: ARM register that stores the result
Rn: ARM register holding first Operand
Operand2: flexible second operand
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Arithmetic & Bit-wise Operations
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Purpose of ADC and SBC
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ADC and SBC can be used to perform 64-bit
operations
64-bit Add Example:
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1st number : r0,r1
2nd number: r2,r3
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Operand2
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Operand2 is a flexible operand with two
possible forms
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#immed_8r: Expression evaluating to numeric constant
Rm{,shift}, where
 Rm: ARM Register holding data for second operand
 shift: Optional shift to be applied to Rm
(LSL,LSR,ASL,ASR,ROR, or RRX)
Why do we need both SUB and RSB?

RSB
r4, r4, #1280 ; r4:= 1280 – r4
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Outline

Review Basic Data Processing Instructions






Arithmetic, Bit-wise, Movement, Comparison
Instructions
ADC, SBC, and RSB
Operand2
Multiply Instructions
Immediate Values
Binary Encoding
8
Register Movement Operations
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op{cond}{S} Rd, Operand2
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Comparison Operations
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op{cond} Rn, Operand2
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Multiplies

Immediate second operands not supported
Result register must be different than first
source
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Only the least significant 32 bits are saved
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11
Multiply Long
Opcode [23:21] Mnemonic
0MUL
1MLA
100UMULL
101UMLAL
110 SMULL
111SMLAL
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Meaning
Multiply(32-bit result)
Multiply-accumulate(32-bit result)
Unsigned multiply long
Unsigned multiply-accumulate long
Signed multiply long
Signed multiply-accumulate long
Effect
Rd:=(Rm*Rs)[31:0]
Rd:=(Rm*Rs+Rn)[31:0]
RdHi:RdLo:=Rm*Rs
RdHi:RdLo+=Rm*Rs
RdHi:RdLo:=Rm*Rs
RdHi:RdLo+=Rm*Rs
‘RdHi:RdLo’ is the 64-bit result from long
multiplication
Assignment is denoted with ‘:=‘,
Accumulation is denoted by ‘+=‘
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Outline

Review Basic Data Processing Instructions






Arithmetic, Bit-wise, Movement, Comparison
Instructions
ADC, SBC, and RSB
Operand2
Multiply Instructions
Immediate Values
Binary Encoding
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Immediate Values
Most immediate values that can be used in ARM data
processing instructions are of the form:
2𝑛
 Immediate = (0 → 255) × 2 , where 0≤ n ≤ 12
 Binary encoding :
 The assembler will report if a user attempts to use an
immediate value which cannot be encoded.
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Binary Encoding
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For Data Processing Instructions
Condition Codes
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Binary Encoding
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For Data Processing Instructions
Opcode:
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Binary Encoding
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For Multiply Instructions
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BACK-UP SLIDES
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How long multiply works
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Supported Immediate Values
00000000 00000000 00000000 XXXXXXXX
00000000 00000000 000000XX XXXXXX00
00000000 00000000 0000XXXX XXXX0000
….
XXXXXXXX 00000000 00000000 00000000
XXXXXX00 00000000 00000000 000000XX
XXXX0000 00000000 00000000 0000XXXX
XX000000 00000000 00000000 00XXXXXX
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Supported Immediate Values
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What if you want an immediate number of the form
following form?
00000000 00000000 XX000000 XXXXXXXX
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Note that this is just …
00000000 00000000 XX000000 00000000 +
00000000 00000000 00000000 XXXXXXXX
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