Transcript L25 – Final Review SP 15 Final Exam – Classroom – Baker 120 (in class) Thursday Apr 30 8:00am-9:45am.

L25 – Final Review SP 15
Final Exam – Classroom – Baker 120
(in class)
Thursday Apr 30 8:00am-9:45am
Topics
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In class exam
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There may be a question on the traditional
manual sequential machine methodology. This
most likely would be to work out the state
diagram of some sequence detector or
straightforward state machine.
Much like the midterm.
9/2/2012 – ECE 3561 Lect
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Copyright 2012 - Joanne DeGroat, ECE, OSU
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The course listing
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Design and analysis of sequential circuits;
digital circuit design using building blocks,
programmable logic devices; design of basic
computer components such as arithmetic logic
units
9/2/2012 – ECE 3561 Lect
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Copyright 2012 - Joanne DeGroat, ECE, OSU
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Spring 15 topic on the exam
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Besides state diagram knowledge and possible
question.
Questions on the MicroBaby architecture.
Questions on the MicroBaby datapath and
ALU.
Questions on the operation of MicroBaby
9/2/2012 – ECE 3561 Lect
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Copyright 2012 - Joanne DeGroat, ECE, OSU
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HDL topics
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The VHDL Entity
The VHDL Architecture
Writing the VHDL description of a small leaf
unit to perform a specified function.
Writing a VHDL structural description to
integrate several leaf units.
9/2/2012 – ECE 3561 Lect
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Copyright 2012 - Joanne DeGroat, ECE, OSU
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Bring you questions
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Look over the previous slide and bring your
questions to Monday’s Final Exam Review.
9/2/2012 – ECE 3561 Lect
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Copyright 2012 - Joanne DeGroat, ECE, OSU
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9/2/2012 – ECE 3561 Lect
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Copyright 2012 - Joanne DeGroat, ECE, OSU
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9/2/2012 – ECE 3561 Lect
9
Copyright 2012 - Joanne DeGroat, ECE, OSU
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9/2/2012 – ECE 3561 Lect
9
Copyright 2012 - Joanne DeGroat, ECE, OSU
9
9/2/2012 – ECE 3561 Lect
9
Copyright 2012 - Joanne DeGroat, ECE, OSU
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