www.c2s2.org Simulation study and tool development for ultra-scaled InAs HEMTs Theme 6 Neerav Kharche, Mathieu Luisier, & Gerhard Klimeck Purdue University, West Lafayette Novel devices beyond.

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Transcript www.c2s2.org Simulation study and tool development for ultra-scaled InAs HEMTs Theme 6 Neerav Kharche, Mathieu Luisier, & Gerhard Klimeck Purdue University, West Lafayette Novel devices beyond.

www.c2s2.org
Simulation study and tool development
for ultra-scaled InAs HEMTs
Theme 6
Neerav Kharche, Mathieu Luisier, & Gerhard Klimeck
Purdue University, West Lafayette
Novel devices beyond Si CMOS
Calibration to existing experimental data
Device structure and modeling approach
•
2015-2019
Research
Experimental
Devices:
III-V HEMTs for
Logic
Applications
(D.H. Kim et. al,
IEDM 07, EDL 08)
•
Gate
• III-V HEMTs/MOSFETs
 recently emerged as potential candidates for highspeed, low-power logic
 Need to develop modeling approaches to aid
experiments and to explore novel designs
•
2-D Schrödinger-Poisson Solver
Real-space effective mass quantum transport
model
Injection (white arrows) from Source, Drain, and
Gate contacts
Source
•
•
Robert Chau, Intel
1
Parameter
Initial
30nm
40nm
50nm
Lg [nm]
30, 40, 50
34.0
42
51.25
tins [nm]
4
3.6
3.8
4.0
myins
0.075
0.078333
0.078333
0.078333
mybuf
0.041
0.042964
0.042964
0.042964
Φm [eV]
4.7
4.6597
4.693
4.6779
0.21,0.24
0.21,0.24
0.21,0.24
Rsd [Ω.mm]
•
•
4
InAs
my
mx,z
Fitted to tight-binding
bandstructure
•
Effective masses in the
channel are extracted from
tight-binding calculation
•
Use experimentally
measured RS, RD to obtain
complete Id-Vg
3
Gate leakage current distribution
Extracted device parameters
Lg = 40nm
Lg = 50nm
Strained
mybuf
through InAlAs myox and
InGaAs mybuff
2
Optimized parameters and Id-Vg comparison
Lg = 30nm
InGaAs
tins
myins
Drain
ΦM
Fitting parameters
 Gate length Lg
 Gate work function Φm
 Insulator thickness tins
 Tunneling effective masses
Lg
InAlAs
Adjust parameters within
experimental uncertainties
to match low Vg regime
Lg [nm]
VtVd=0.05
VtVd=0.5
S [mV/dec]
DIBL
[mV/V]
ION/IOFF
vinj [cm/s]
30
-0.1569
-0.1611
-0.2328
-0.2262
106.9
105.17
168.9
144.73
471.7930
612.406
3.0035x107
40
-0.1425
-0.1507
-0.1992
-0.1954
90.9
89.39
126.0
99.31
1.384x103
1.86x103
3.1127x107
50
-0.1359
-0.1369
-0.1796
-0.1778
85.1
89.2
97.2
90.82
1.7958x103
1.854x103
3.1771x107
Evaluation methodology proposed in R.Chau et. al. (T-Nano 2005) is used
•
Device metrics
Black: simulated Id-Vg
Red: experimental Id-Vg
•
Good matching with experimental Id-Vg is achieved for devices with 3 different
gate lengths
•
•
Simulator can be used to study scaling behavior of nanoscale InAs HEMTs
Design optimization:
gate work function engineering
Bias: low Vg high Vd
Plan to study scaling behavior and explore device design optimizations
•
Gate leakage current is concentrated at the edges
of the gate contact
Edge geometry plays an important role in
determining gate leakage current
5
6
Material parameters
Tool deployment on nanoHUB.org
Vd=0.5V
Vd=0.05V
Effect of geometrical
parameters such as
• gate length Lg,
VT0.05
[eV]
-0.0678
0.0323
0.1324
0.2323
0.3324
ΦM
[eV]
4.7
4.8
4.9
5.0
5.1
•
•
•
VT0.5
S
DIBL
[eV]
[mV/dec] [mV/V]
-0.1216
107.99
119.70
-0.0215
105.88
119.72
0.0785
105.33
119.70
0.1785
105.21
119.50
0.2785
105.19
119.83
IOFF
[A/m]
0.8860
0.6995
0.6550
0.6436
0.6450
ION
[A/m]
393.43
393.57
393.51
393.56
393.92
•
ION/IOFF
gm,max
444.02
562.60
600.80
611.53
610.71
1537.67
1537.06
1538.86
1537.58
1554.63
•
Wide variety of
materials can be
simulated by
supplying appropriate
material parameters
insulator thickness
tins,
Channel thickness
tchannel etc
can be analyzed
Higher Φm shifts Vt in +ve direction
Reduces gate leakage
Subthreshold slope , DIBL and gm,max unaffected
8
7
IV characteristics
9
Summary
In-depth insight into device operation
•
• Electron injection
is done from
Source, Drain &
Gate contacts
• Simulates various
transfer
characteristics
•
Effective mass based 2-D Schrödinger-Poisson Solver to
simulate III-V HEMTs is presented
Injection from Source, Drain, and Gate contacts modeled
Study gate-leakage current
Simulator is verified against the experimental
measurements on InAs HEMTs (good quantitative match)
Ongoing work: optimize the design of 20nm III-V HEMTs
•
The tool ‘omenHFET’ will be deployed on nanoHUB.org
•
•
•
Electrostatic potential
Id-Vg
Ig-Vg
Id-Vd
Ig-Vd
Electron distribution
y-component of gate
leakage current in
OFF state
10
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The use of the nanoHUB.org computational infrastructure operated by the Network for Computational
Nanotechnology and funded by the National Science Foundation is gratefully acknowledged
2009
MSD
Annual
Review
2008 MSD Annual Review
12