Transcript EE 5340 Semiconductor Device Theory Lecture 27 – Spring 2011 Professor Ronald L.

EE 5340
Semiconductor Device Theory
Lecture 27 – Spring 2011
Professor Ronald L. Carter
[email protected]
http://www.uta.edu/ronc
Fully biased n-MOS
capacitor
VG
Channel if
VG > VT
VS
EOx,x> 0
n+ e- e- e- e- e- e-
n+
VD
p-substrate
Vsub=VB
Depl Reg
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0
Acceptors
L
y
2
MOS energy bands at
Si surface for n-channel
Fig 8.10**
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3
Computing the D.R.
W and Q at O.S.I.
Ex
xd ,max 

2Si 2  p  (VB VS )

qNa
Emax
q
dEx

Na
dx
Si
area  2  p  (VB VS )
x
Qd,max  qNa xd,max
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Q’d,max and xd,max for
biased MOS capacitor
Fig 8.11**
xd,max
(mm)
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Q'd,max
q
-2
(cm )
5
Fully biased nchannel VT calc
p  substrate : VG, at threshold  VT
VT  VC  VFB  2p 
Q'd,max
 VFB  V
C'Ox
 ni 
p  Vt ln   0, Q'd,max  qNa xd,max ,
 Na 
xd,max 
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

2 2 p  VB  VC 
qNa
, V  0
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n-channel VT for
VC = V B = 0
Fig 10.20*
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Fully biased pchannel VT calc
n  substrate : VG, at threshold  VT
VT  VC  VFB  2n 
Q'd,max
C'Ox
 VFB  V
 Nd 
n  Vt ln   0, Q'd,max  qNdxd,max ,
 ni 
22 n  VC  VB 
xd,max 
, V  0
qNd
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p-channel VT for
VC = V B = 0
Fig 10.21*
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n-channel enhancement
MOSFET in ohmic region
Channel
VS = 0
Depl Reg
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0< VT< VG
EOx,x> 0
n+ e-e- e- e- e-
p-substrate
VB < 0
0< VD< VDS,sat
n+
Acceptors
10
Conductance of
inverted channel
•
•
•
•
•
Q’n = - C’Ox(VGC-VT)
n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2)
The conductivity sn = (n’s/t) q mn
G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so
I = V/R = dV/dR, dR = dL/(n’sqmnW)
L
VD
0
VS
I  dL   C'Ox VG  VC   VT  mnWdV
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Basic I-V relation
for MOS channel
WmnC'Ox
2
ID 
2VG  VT VDS  VDS
, VDS  VG  VT
2L
At VDS  VDS,sat  VG  VT , Q'n y  L   0  Sat.


so let ID be given by ID VDS,sat ,
for VDS  VDS,sat  VG  VT so
ID  ID,sat
Wmn C'Ox
2
VG  VT 

2L
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I-V relation for
n-MOS (ohmic reg)
mnC'Ox W
2


ID 
2VG  VT VDS  VDS
. Note
2
L
VDS  VG  VT  VDS,sat ,
result is non - physical.
At VDS,sat , n's, y L  0
ID
ID,sat
for
ohmic
non-physical
assume that channel curr.
is const for VDS  VDS,sat
ID,sat
mnC'Ox W
VGS  VT 2

2
L
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saturated
VDS,sat
VDS
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Universal drain
characteristic
mnC'Ox W
ID1 
 1V 2
2
L
9ID1
ID
ohmic
4ID1
ID1
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mnC'Ox W 2
ID,sat 
VDS
2
L
VGS=VT+3V
saturated, VDS>VGS-VT
VGS=VT+2V
VGS=VT+1V
VDS
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Characterizing the
n-ch MOSFET
VD
ID
ID
D
G
S
slope 
B
 mnC'Ox W 


L
 2
VDS  VGS , VT  0
VDS  VGS  VT , so
mnC'Ox W
VGS  VT 2
ID,sat 
2
L
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VT
VGS
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Substrate bias effect
on VT (body-effect)
Letting VT calculatio n be relative to Source
VT  VS  VFB  2 p 
xd,max 
VT VSB

 qNa xd,max
2 2 p  VSB

qNa
2 SiqNa
 0 
C'Ox
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C'Ox
, where
, so VT  VT VSB  
 2
p
 VSB  2 p

16
Body effect data
Fig 9.9**
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Low field ohmic
characteristics


mnC'Ox W
2
ID 
2VGS  VT VDS  VDS
,
2
L
for ohmic region. Furthermore, let
VDS  VG  VT , so that
W
ID  mnC'Ox VGS  VT VDS
L
W
 KP VGS  VT VDS , KP  mnC'Ox
L
 dID 
W
 KP VDS
 dV 
L
 GS  V V V
DS
G
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T
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MOSFET circuit
parameters
Transcondu c tan ce
ID
gm 
VGS V
DS
gms
gmL
WmnC'Ox

VDS , saturation
L
WmnC'Ox
VGS  VT , ohmic region

L
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MOSFET circuit
parameters (cont)
Output or drain conductanc e
ID
gd 
VDS V
GS
gds  0, saturation
gdL
Wmn C'Ox
VGS  VT  VDS , ohmic

L
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MOSFET equivalent
circuit elements
Fig 10.51*
Cgs
2
1
 COx , Cgd  COx , COx  WLC'Ox
3
3
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MOS small-signal
equivalent circuit
Fig 10.52*
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MOS channellength modulation
Fig 11.5*
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Analysis of channel
length modulation
Assume the DR change is
the same as the length mod
2 Si
L 
qNa
 2
p
 VDS,sat  VDS
 2 p  VDS,sat

VDS  VDS  VDS,sat
L
I'D 
ID
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Channel length modulated drain char
Fig 11.6*
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Implanted n-channel
enhance-ment MOSFET
(ohmic region) 0< V < V e- channel ele
Channel
VS = 0
Depl Reg
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T
EOx,x> 0
n+ +e+-e+ -+ e+ -+ +e+- + +e+- +
p-substrate
VB < 0
G
+ implant ion
0< VD< VDS,sat
n+
Acceptors
26
Ion implantation*
Si & SiO2
A
l Si3N4
R
a
n
g
e
S
i
Al & SiO2

R
P
Si3N4
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“Dotted box” approx**
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Calculating
xi and VT

N
dx

N
X
impl
ai
i

0 

area under dashed curve  area under dotted curve
If x i  xd,max , thenVT  VFB
  Ni  N ai
'
'
Qss  Qss , before impl  qN i xi
  Ni  N di
T o get Vt as desired, implant toget N ai and xi
qN i x i
so ΔVt   '
Cox
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If xi ~ xd,max


2
2 N ai
xd 
 s   p  xi
qNa
Na
Qd  qNai xi  qNa xd ,msx
 qNai xi


 2qNa  ps   p  VSB  q x N a N ai
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2
2
i
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Calculating VT
Q
 qNai xi
VT  ms 

  p   ps
'
C
COx
'
ss
'
Ox
1
 '
COx


2qNa  ps   p  VSB  q x N a N ai
2
2
i
 N a  N ai xi 
 N a  N di xi 
 , or  Vth ln

 ps  Vth ln
ni
ni




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Implanted VT
Vt per Eq. 9.1.23 in M&K for a
MOSFET with an
87-nm-thick gate oxide,
Qff/q = 1011 cm-2,
N’ = 3.5 X 1011 cm-2, and
Na = 2 X 1015 cm-3. Both
VS and VB =
Figure 9.8 (p. 441)
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Mobilities**
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Substrate bias effect
on VT (body-effect)
Letting VT calculatio n be relative to Source
VT  VS  VFB  2 p 
xd,max 
VT VSB

 qNa xd,max
2 2 p  VSB

qNa
2 SiqNa
 0 
C'Ox
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C'Ox
, where
, so VT  VT VSB  
 2
p
 VSB  2 p

34
Body effect data
Fig 9.9**
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M&K Fig. 9.9 (Eq. 9.1.23)
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Subthreshold
conduction
• Below O.S.I., when the total band-bending <
2|p|, the weakly inverted channel conducts
by diffusion like a BJT.
• Since VGS>VDS, and below OSI, then Na>nS
>nD, and electr diffuse S --> D
Electron concentration
at Source
ID,subthresh
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Concentration gradient
driving diffusion
 VGS 
  VDS  
 exp
 1  exp
 
 Vt 
 Vt   37
M&K Fig.9.10 (p.443)
Band diagram along the channel region of an n-channel MOSFET
under bias, indicating that the barrier qΦB at the source
depends on the gate voltage.
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M&K Fig. 9.11 (p.444)
Measured subthreshold characteristics of an MOS transistor with a 1.2 μm
channel length. The inverse slope of the straight-line portion of this
semilogarithmic plot is called the drain-current subthreshold slope S
(measured in mV/decade of drain current).
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Subthreshold
current data
Figure 10.1**
Figure 11.4*
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Mobility variation
due to Edepl
Figures 11.7,8,9*
m eff
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 Eeff 

 m 0 
 E0 
1 3
41
Velocity saturation
effects
Figure 11.10*
" speed limit" vsat  vth
m
m eff
2 1 2
 m E
 1   eff  
  vsat  


So v  vsat as E  
gm,sat  WCOx vsat
vsat
fT 
2L
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References
* Semiconductor Physics & Devices, by
Donald A. Neamen, Irwin, Chicago,
1997.
**Device Electronics for Integrated
Circuits, 2nd ed., by Richard S. Muller
and Theodore I. Kamins, John Wiley
and Sons, New York, 1986
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