Transcript MOSFET Structure

MOSFET Structure
Source Gate
Drain
Gate Oxide
Field Oxide
n+
p-Si
L
Bulk (Substrate)
• Importance for LSI/VLSI
– Low fabrication cost
– Small size
– Low power consumption
• Applications
– Microprocessors
– Memories
– Power Devices
• Basic Properties
–
–
–
–
–
Unipolar device
Very high input impedance
Capable of power gain
3/4 terminal device, G, S, D, B
Two possible device types: enhancement mode; depletion
mode
– Two possible channel types: n-channel; p-channel
Symbols
D
D
B
G
S
p Channel MOSFET
B
G
S
n Channel MOSFET
Current-Voltage Characteristic
IDS
B
C
D
A
VDS
Channel Formation
S
p-Si
VG
n-Channel
B
D +V
DS
Analysis: Low VDS
(A)
Q
I DS   n
TR
Qn  Channel Charge
TR  Channel Transit Time
L

vd
vd  Drift Velocity
Qn  CV
 CO (VGS  VT )WL
I DS 
n CO (VGS  VT )WL
VDS
L2
I DS  n
W
C (V  V )V
L O GS T DS
L2
TR 
nVDS
Intermediate VDS
(B)
Source
Channel
Drain
VT
VG
VG-channel
VDS
VDS/2
Increased VDS
S
p-Si
VG
n-Channel
B
D +V
DS
Analysis: Intermediate VDS
VDS
Qn  CO (VG   VT )WL
2
First Order Approximation
Gate to Channel Voltage = VGS-VDS/2
V 
W 
I DS  n   CO VG  VT  DS VDS
 L 
2 
VDS2 
W 
 n   CO  (VG  VT )VDS  
 L 
2 
Extra term!
Large VDS: Saturation (C)
Source
Channel
VG-channel
VG
Drain
VDS
VT
Pinch-off
Analysis: Saturation (C)
Pinch-off
VDS ( sat )  VG  VT
Substitute for VDS(sat) in equation for IDS to get IDS(sat)
I DS
VDS2 
W 
 n   CO  (VGS  VT )VDS  
 L 
2 
(VGS  VDS ) 2 
W 
2
I DS ( sat )  n   CO  (VGS  VT ) 

 L 
2

n  W 
2
  CO VGS  VT 
2  L
 constant

Avalanche and Punch-Through
(D)
• For very large VDS, IDS increases rapidly due to drain
junction avalanche.
• Can give rise to parasitic bipolar action.
• In short channel transistors, the drain depletion region may
reach the source depletion region giving rise to ‘Punch
Through’.