Transcript Negative Bias Temperature Instability (NBTI) in pMOSFETs: Characterization, Material/Process Dependence and Predictive Modeling (Part 1 of 3) Souvik Mahapatra Department of Electrical Engineering Indian.

Negative Bias Temperature Instability (NBTI) in pMOSFETs: Characterization, Material/Process
Dependence and Predictive Modeling (Part 1 of 3)
Souvik Mahapatra
Department of Electrical Engineering
Indian Institute of Technology Bombay, Mumbai, India
Email: [email protected]; [email protected]
Co-contributors: M. A. Alam & A. E. Islam (Purdue), E. N. Kumar, V. D. Maheta,
S. Deora, G. Kapila, D. Varghese, K. Joshi & N. Goel (IIT Bombay)
Acknowledgement: C. Olsen and K. Ahmed (Applied Materials), H. Aono, E.
Murakami (Renesas), G. Bersuker (SEMATECH), CEN IIT Bombay, NCN Purdue,
Applied Materials, Renesas Electronics, SEMATECH, SRC / GRC
1
Outline
Introduction, Basic NBTI signatures
Fast / Ultra-fast drain current degradation measurement
Part-I
Estimation of pre-existing and generated defects
Transistor process / material dependence
Part-II
Role of Nitrogen – Study by Ultrafast measurement
Predictive modeling
Part-III
Conclusions / outlook
2
Outline
Introduction, Basic NBTI signatures
Fast / Ultra-fast drain current degradation measurement
Estimation of pre-existing and generated defects
Transistor process / material dependence
Role of Nitrogen – Study by Ultrafast measurement
Predictive modeling
Conclusions / outlook
3
Negative Bias Temperature Instability (NBTI)
VDD
Issue: p-MOSFET in inversion
Parametric degradation (VT, gm) in time,
shows power law time dependence (~ A*tn)
VG=0
VDD
Degradation increases at higher T and higher
(negative) stress bias
-1
10 1.2nm (nitrided)
stress (-VG)
1.9V
2.1V
O
VT (V)
T=100 C
O
T=27 C
Kimizuka, VLSI’00
-2
10
0
10
1
2
10
10
10
stress time (s)
3
4
A Simple Physical Framework of NBTI
Parametric (VT, gm, IDLIN) shift due to positive charges generated
at the Si/SiO2 interface and/or at SiO2 bulk
Generation of interface traps
G
Generation and subsequent
charging of bulk oxide traps
D
S
B
Charging of pre-existing
(process related) bulk oxide
traps
5
Very Long Time Degradation
Universally observed long-time powerlaw time exponent of n = 1/6 in
“production quality” devices
Similar observation in circuits
Chen, TSMC, IRPS’05
0.30
0
Degradation Slope, n
-25 C
0.25
0
105 C
0
45 C
0
145 C
0.20
1/6 line
0.15
0.10 Stress time ~ 28Hr
Krishnan, TI, IEDM’06 (in Islam et. al)
0.05
1.2
1.8
2.4
Vstress [Volts]
Vmin for SRAM
~t
1/6
Tech A, V1
Tech A, V2
Tech B, V1
Haggag, Freescale,
IRPS’07
Stress Time > 1000 Hr
Important feature for prediction
of degradation at end-of-life
6
Dependence on Stress VG and Gate Leakage
NBTI not governed by gate voltage – higher
NBTI (lower lifetime) for thinner oxide
-VG
p-MOSFET inversion:
Electron tunneling from
gate to bulk, hole
tunneling from bulk to gate
IB
Kimizuka, VLSI’99
IG
ISD
-2
COX/q * VT shift (cm )
-2
COX/q * VT shift (cm )
No correlation with electron
energy dissipated in anode
11
10
O
T=25 C
TPHY
36A
26A
10
10
-5
10
O
11
10
-3
-2
T=25 C
TPHY
36A
26A
10
10
2
10
10
10
[JG. VG. t] (arb. unit)
Mahapatra, TED’04
-4
No correlation with
electron energy even
under ballistic limit
3
4
q.VG (eV)
5
6
7
Dependence on Stress EOX
Huard, MR’05
NBTI governed by oxide electric field
VT * COX / q
PMOS inversion shows similar NBTI
as NMOS accumulation under similar
oxide field (not same voltage)
10
-2
10
-3
10 10-1 100 101 102 103 104 10
9
-2
NIT shift (10 cm )
stress time (s)
-4
PI, -3.2V
NA, -3.2V
NA, -4.2V
O
TPHY(A )
26
36
12
10
VG (V), EOX (MV/cm)
-1
EOX
8
5
O
T=25 C
4
O
VG
3
Tsujikawa, IRPS’03
Mahapatra, TED’04
1
T=25 C
TPHY=26A
O
Normalized ID shift (VG-VT=0.7V)
10
8
Parametric Degradation
Tsujikawa, MR’05
Degradation in subthreshold slope (due
to generation of interface traps, NIT)
For a given VT, IDSAT > IDLIN
(as 1 <  < 2)
For a given VT, larger IDLIN for
thinner oxide (lower overdrive)
I DLIN (VT )

I DLIN V G  V T 
I DSAT
(VT )

V G  V T 
I DSAT
Krishnan, IEDM’03
9
Gate Insulator Material / Process Impact
Larger NBTI for SiON compared to
SiO2 gate insulator
Increase in NBTI with higher N
content in the gate insulator
Mitani IEDM’02
NBTI reduction by suitable “process
optimization”
Tan EDL’04
Sakuma
IRPS’06
VT = A*tn
10
Post Stress NBTI Recovery
Reisinger IRPS’06
-VG (R)
Tsujikawa, MR’05
fraction remaining
fraction remaining
-VG (S) Stress Recovery
1.1
Low N%
1.0
0.9
0.8
0.7
0.6 tSTR=1000s
VSTR / VREC (V)
0.5
-1.7 / -1.3
0.4
-2.3 / -1.8
0.3
-2.3 / -1.3
-2.3 / -1.0
0.2
0.1
1.1
High N%
1.0
0.9
Kapila,
0.8
IEDM’08
0.7
0.6 tSTR=1000s
VSTR / VREC (V)
0.5
-1.7 / -1.3
0.4
-2.3 / -1.8
-2.3 / -1.3
0.3
-2.3 / -1.0
0.2
0.1 -7
-5
-3
-1
1
3
5
10 10 10 10 10 10 10
recovery time (s)
Recovery of
degradation after
removal of stress
Recovery of
subthreshold slope
 interface trap
passivation
Recovery depends
on stress-recovery
bias difference and
SiON process
11
DC and AC Stress – Duty Cycle & Frequency
Recovery: Lower NBTI for AC stress
Independent of frequency when
properly measured (no high f reflection)
Nigam, IRPS’06
Large spread of published data on
duty cycle dependence, AC/DC ratio
Toshiba
IMEC
Ours:
(v-low N%)
degradation
1.0
Fernandez, IEDM’06
0.8
ST
NUS
(mid N%)
Infineon
TUV
0.6
?
0.4
0.2
0.0
RD
Three well
Two well
Mahapatra, IRPS’11
1
3
5
7
9
0 20 40 60 801000 10 10 10 10 10
frequency (Hz)
duty cycle (%)
12
Motivation
Explanation of the following features:
Strong gate insulator process dependence
Time evolution of degradation, prediction at long time
Temperature and oxide field dependence of degradation
Recovery of degradation after DC stress
Duty cycle and frequency dependence under AC stress
Understanding and estimation of defects responsible for
degradation under accelerated stress condition
Predictive modeling for lifetime projection – extrapolation of shorttime accelerated stress data to end-of-life under use condition
13
Outline
Introduction, Basic NBTI signatures
Fast / Ultra-fast drain current degradation measurement
Estimation of pre-existing and generated defects
Transistor process / material dependence
Role of Nitrogen – Study by Ultrafast measurement
Predictive modeling
Conclusions / outlook
14
Issues with Measure-Stress-Measure Approach
Unintentional recovery during measurement delay
Lower magnitude & higher slope (n)
Measurement
-VG (M)
due to recovery during measure delay
Stress
Increase in slope (n) with higher T and
-VG (S)
higher measure delay – artifact
M-time
Need “delay-free” measurement
-2
7x10
0.30
EOT=2.2nm (nitrided)
VG(stress)=-3.0V
VG(meas)=-1.5V
0.28
O
VT (V)
T=150 C
50ms, 0.185
100ms, 0.20
350ms, 0.213
-2
10
0
10
1
2
10
10
stress time (s)
3
10
time exponent
0.26
0.05s (delay)
0.35s
1s
0.24
0.22
0.20
0.18
0.16
0.14
0
Varghese, IEDM’05
50
100
150
O
Temperature ( C)
200
15
Ultra-Fast Measure-Stress-Measure (MSM) Method
PGU
IVC
DCPS
DSO
Yang, VLSI’05
Superpose fast triangular pulse on
top of stress gate voltage – measure
ID-VG (hence VT) using IVC-DSO
Larger degradation and recovery
magnitude for fast MSM compared to
conventional (slow) MSM
16
Ultra Fast MSM (Constant Current) Method
Switch between stress & measure modes
OPAMP based feedback to force constant
current in measure mode
ID kept constant, change in VT (due to
NBTI stress) gets adjusted by VG
change, hence VT ~ VG
Clear stress VG dependence of degradation
Weak T activation of degradation at short
stress time
Reisinger, IRPS’06
17
On-The-Fly (OTF) IDLIN Method (Conventional)
Start ID sampling in SMU
PGU
SMU
SMU triggers PGU, PGU
provides gate stress pulse
IDLIN
IDLIN (A)
VG
Continue ID sampling without
interrupting stress
Rangan, IEDM’03
time
780
O
760
PNO (23.5A )
740
720
O
T=125 C
700
VG=-2.9V
680
660
O
RTNO (22.5A )
640
620 -4
-2
0
2
4
10
10
10
10
10
time since application of VG,STRESS
Delay in IDLIN0 measurement:
time-zero delay t0 ~ 1ms
18
IDLIN (A)
Calculated Degradation from IDLIN Transient
780
V (t) = – (IDLIN (t) – IDLIN0 (1ms))/IDLIN0
O
760
PNO (23.5A )
740
I
720 DLIN0
Clear bias dependence for all time
O
T=125 C
700
VG=-2.9V
scalable to unique relation
680
660
O
RTNO (22.5A )
640
Clear T dependence for all time –
620 -4
-2
0
2
4
scalable to unique relation
10
10
10
10
10
time since application of VG,STRESS
scaled data
-1
10
O
RTNO (22.5A , 6%)
10
-2
O
t0 delay = 1ms
-3
10 -4
10
10
-2
T=125 C
-2.3V
-2.5V
-2.9V
0
10
10
stress time (s)
–
scaled data
V (V)
V (V)
10
(1ms)
-1
O
10
RTNO (22.5A , 6%)
VG=-2.9V
-2
O
55 C
O
85 C
t0 delay = 1ms
2
10
4
O
125 C
-3
10 -4
10
Varghese, IEDM’05
10
-2
0
2
10
10
stress time (s)
10
4
19
Conventional OTF Measurement Results
Power law time dependence of longer time data, with time
exponent n ~ 0.14-0.15 for all stress bias and temperature
Different magnitude but similar time exponent for different film
type (Details of GOX process dependence discussed later)
Stress VG and T
Film type, EOT
O
-1
10
VT (V)
VT (V)
10
-1
-VG(V) / T( C) [1.2nm]
1.9 / 100
1.9 / 125
1.55 / 125
2.1 / 125
1.9 / 125
1.9 / 150
PNO (21%)
PNO(1.7nm, 28%), -2.3V
PNO(2.2nm, 29%), -2.5V
RTNO(1.2nm, 11%), -1.9V
RTNO(1.2nm, 17%), -1.75V
CONT(1.3nm), -1.9V
-2
10
PNO (14%)
-2
10
10
O
T=125 C
-3
0
1
2
10
10
stress time (s)
10
3
6x10 0
10
Mahapatra, IRPS’07
1
2
3
10
10
10
stress time (s)
20
Ultra-Fast On-The-Fly (UF-OTF) IDLIN Method
PGU
IVC
SMU
Current measurement: Short-time
(1s-100ms) using IVC-DSO, long
time (≥1ms) using SMU
-0.4
-0.8
-1.2
-1.6
-2.0
-2.4
VG,STRESS
-2.8
-3.2
PNO (2.35nm)
-3.6
-4.0
4
8 12 16 20
time (s)
750 T=125OC
700
600
550
500
-4
Kumar, IEDM’07
0
VG (V)
650
780
O
760
PNO (23.5A )
740
720
O
T=125 C
700
VG=-2.9V
680
O
660 RTNO (22.5A )
640
620 -7
-5
-3
-1
1
3
10 10 10 10
10 10
time since application of VG,STRESS
IDLIN (A)
DSO
IDLIN (A)
Start ID sampling (1s rate) using
IVC-DSO, trigger PGU via SMU
Delay in IDLIN0 measurement:
time-zero delay t0 ~ 1s
21
Degradation: Impact of “Time-Zero” Delay
IDLIN (A)
780
O
760
PNO (23.5A )
740
720
O
T=125 C
700
VG=-2.9V
680
O
660 RTNO (22.5A )
640
620 -7
-5
-3
-1
1
3
10 10 10 10
10 10
time since application of VG,STRESS
t0 delay: Time lag between application of
stress VG and measurement of 1st IDLIN data
PNO: Higher NBTI for lower t0 delay, t0
delay mostly impacts short-time data
RTNO: Large t0 impact on short- and longtime data, higher NBTI compared to PNO
O
O
PNO (23.5A , 17%)
RTNO (22.5A , 6%)
EOX = 8.5 MV / cm
0
T=125 C
-1
10
-1
10
-2
t0 delay
1s
1ms
30ms
-2
10
10
-3
3x10 -6
10
-3
V = IDLIN/IDLIN0
* (VG – VT0),
where IDLIN0
picked at 1s,
1ms and 30ms
0
T=125 C
V (V)
V (V)
t0 delay
1 s
1ms
30ms
EOX ~ 8.5 MV / cm
0
10
10
stress time (s)
-3
3x10 -6
10
10
3
-3
0
10
10
stress time (s)
3
10
Maheta, PhD
thesis (IITB)
22
Time Evolution of Long-time Degradation
-2
7x10 |V |=1.9; 2.1; 2.3; 2.5 (V)
G
O
RTNO (22.5A , 6%)
-1
V (V)
n=0.06
n=0.12
V(V)
10
Power-law time
dependence at
longer stress
O
T=125 C
t0=1s
t0=1s
O
PNO (23.5A , 17%)
10
-2
O
-3
5x10
10
-3
EOX=8.5MV/cm, T=125 C
-2
10
-1
0
1
10 10 10
stress time (s)
2
7x10
3
10
O
time exponent (n)
0.20
0.16
T=125 C; t0=1s
10s-10Ks
10s-1Ks
100s-10Ks
0.12
0.08
1.8
EOT=1.4nm
N=12%
2.0 2.2 2.4
stress -VG (V)
2.6
time exponent (t=10s-1000s)
10
EOT=1.4nm
N=12%
-2
1
2
10
3
4
10
10
10
stress time (s)
0.18
O
Similar n for
different stress
VG, time range for
linear fit
O
PNO (14A -23.5A ; 17%-22%)
0.15
0.12
0.09
RTNO
0.06
10
-6
10
-5
-4
-3
10 10
t0 delay (s)
10
-2
Time exponent (n)
depends on t0
delay – reduces at
lower t0 but
saturates for t0 <
10s Maheta, PhD
thesis (IITB)
23
UF-OTF: Bias Dependence of Degradation
RTNO shows higher magnitude and
lower bias dependent acceleration
compared to PNO
0
-1
10
T=125 C
t0=1s
V (V)
RTNO
-VG (V)
3.3
2.9
2.5
-2
10
EOT=22.5 A
N%=6
-3
3x10 -6
10
-3
0
0
3
10
10
stress time (s)
10
V (V)
10
3.3
2.9
2.5
time exponent (10s - 1000s)
-VG (V)
-1
0
EOT = 23.5 A
N% = 17
PNO
10
-2
t0=1s
0
T=125 C
-3
3x10 -6
10
-3
0
10
10
stress time (s)
Lower long-time power law time
exponent (n) for RTNO compared to
PNO – n independent of oxide field
10
3
0
0.14
T = 125 C
0.12
O
0.10
O
PNO (14A -23.5A , 17%-22%)
0.08
O
RTNO (22.5A , 6%)
0.06
0.04 t0 = 1s
6
Maheta, TED 2008
7
EOX
8
9
(MV / cm)
10
24
UF-OTF: Temperature Dependence of Degradation
RTNO shows negligible T dependence
at short time, weak T activation at
longer time
0
T ( C)
125
85
55
-1
V (V)
10
RTNO
EOT = 22.5 A
N% = 6
-2
10
EOX ~ 8.5 MV/cm
-3
3x10 -6
10
PNO shows strong T activation from
short to longer time
0
-3
0
10
10
stress time (s)
3
10
V (V)
10
-1
time exponent (10s -1000s)
0
T ( C)
125
85
55
EOX~8.5 MV/cm
PNO
0
EOT = 23.5 A
N% = 17
10
-2
t0=1s
-3
3x10 -6
10
-3
0
10
10
stress time (s)
10
Long-time power law time exponent
(n) independent of T (no delay artifact)
3
EOX ~ 8.5 MV / cm
0.14
0.12
O
0.10
O
PNO (14A -23.5A , 17%-22%)
0.08
O
RTNO (22.5A , 6%)
0.06
0.04 t0=1s
0
Maheta, TED 2008
30
60
90 120 150 180
0
T ( C)
25
Mobility Correction
Difference between V (OTF) and VT (MSM,
peak gm method) due to mobility degradation
-1
O
PNO (14A , N=12%)
VG,STRS=-2.1V
o
T=125 C
degradation (V)
V read at VDD gives 1:1 correlation with VT
VT (UF-MSM)
OTF: Stress followed by recovery at VG=VDD
V (UF-OTF)
-IDLIN/IDLIN0 * (VG,SENS - VT0)
10
-2
10
1
2
10
stress time (s)
10
3
-1
10
0.10
0.08
0.06
0.04
0.02
Scaling end of stress data to recovery data
measured at 1s enforces mobility correction
VG,SENS(V)
-2.1 (Stress)
-1.1 (VDD)
degradation (V)
10
O
PNO (23.5A , 17%)
Recovery
-VG (R)
-2
10
UF-MSM
UF-OTF
-3
Stress (VG=-2.9V)
Recovery (VG=-1.3V)
Scaled stress
0.00
10
0.00 0.02 0.04 0.06 0.08 0.10 10-7 10-5 10-3 10-1 101 103
stress / recovery time (s)
VT (peak gm method)
Stress
-VG (S)
Mobility correction:
Islam, IRPS’08
26
Summary
Recovery of NBTI degradation after removal of stress – issues
with conventional “slow” MSM methods
Ultrafast MSM can provide VT shift with negligible artifacts, is
useful for capturing long time degradation for lifetime
determination, early part (t<1s) degradation cannot be studied
Constant current ultrafast MSM method is an alternative, but needs
subthreshold slope correction to determine proper VT shift
On-the-fly (OTF) IDLIN methods can be used to study degradation
from 1ms (fast version) and 1s (ultra-fast version) time scale
Important process dependent signatures observed in sub ms
time scale by UF-OTF method (discussed in detail later)
OTF IDLIN needs mobility correction to obtain VT shift
27
Outline
Introduction, Basic NBTI signatures
Fast / Ultra-fast drain current degradation measurement
Estimation of pre-existing and generated defects
Transistor process / material dependence
Role of Nitrogen – Study by Ultrafast measurement
Predictive modeling
Conclusions / outlook
28
Background – The “Philosophy”
I-V measurements (previous section) influenced by generation
of interface and bulk traps, plus trapping in pre-existing traps
How to independently
estimate pre-existing traps?
Eg: Flicker noise
G
D
S
B
How to independently
estimate interface and bulk
trap generation? Eg: DCIV,
Charge pumping, Flicker noise,
LVSILC and SILC
Can different measurements be
correlated?
29
Flicker Noise Measurement (Pre-stress)
Measure ID power spectral density versus frequency at low gate
overdrive
Flicker noise due to trapping/
detrapping of holes in oxide traps
DC Supply + LPF
LNA + DSA
p+
p+
n
SVG = SID / gm
High pre-existing hole trap density
for certain (type-B) devices
Increase in pre-existing hole trap
density with N density
60
-10
Identical inversion charge
SVG V /Hz
-11
10
-12
10
2
2
SVG (V /Hz)
10
Type-A
Type-B
1
10
frequency (Hz)
40
PNO w proper PNA
30
20
10
-13
3x10
0
3x10
50
Freq = 15.625 Hz
Fixed inversion charge
2
10
Kapila, IEDM’08
0
22.6 29.4 34.6 41.3 42.5
atomic N%
30
DCIV Measurements
Sweep VG with S/D in F.B, measure ISUB
due to electron-hole recombination in
traps at or near Si/SiO2 interface
VF
p+
p+
n
ISUB
Increase in ISUB due to stress seen in
both SiO2 and SiON: Indicates trap
generation at or near Si/SiO2 interface
Neugroschel, MR’07
Stathis IRPS’04
Stress
time
Stress time
31
DCIV Measurements
Neugroschel, MR’07
Power law time dependence (A*tn),
with n ~ 1/6 at long stress time for
different stress VG and T
Reduction in ISUB after stress seen in
both SiO2 and SiON: Indicates recovery
of generated traps
Neugroschel, MR’07
Recovery
Recovery
time
SiON, 2.3nm
Stress
Campbell
IRPS’06
32
Correlation of DCIV to I-V Measurements
Similar degradation and recovery signatures across different
methods: VT, gm (from slow MSM I-V) and IDCIV (DCIV)
Good correlation of IDCIV to
VT & gm degradation
during stress and recovery
Chen, IRPS’03
33
Charge Pumping Measurements
p+
Pulse VG repetitively from inversion to
accumulation, measure ISUB due to
electron-hole recombination in traps at
Si/SiO2 interface and inside SiO2 bulk
p+
CP current increase (trap generation) with
stress time - power law time dependence larger n than IDLIN measurement
n
ICP
0.34
0.32
O
9
T=150 C
10
1
O
T=27 C
time exponent
0.30
-2
NIT (x10 cm )
10
2
CP (f=800kHz)
VG=-3.0V (stress)
EOT=2.2nm
0.28
0.26
0.24
0.22
0.20
0
2x10 0
10
1
2
10
10
10
stress time (s)
3
0.35s (delay)
0.5s
1s
0.18
0
Varghese, IEDM’05
50
100
150
O
Temperature ( C)
Time exponent
increases with
delay time and
stress T – recovery
related artifact
200
34
Correlation of CP to I – V Measurements
Both VT (slow MSM) and ICP
shows power law time dependence
and higher degradation for NO-SiON
Both VT (slow MSM) and ICP
shows recovery of degradation, and
larger recovery for NO-SiON
Mitani, MR’08
35
Impact of Stress on Flicker Noise
SVG (V /Hz)
10
O
stress VG=-2.3V; T=150 C
stress t=4000s
O
EOT=20A , N=36%
post-stress
-11
2
10
-10
pre-stress
1/f trend line
10
-12
-13
measure:|VG|=0.9V
|VD|=1.5V
4x10
0
3x10
1
1
2
10
frequency (Hz)
10
Increase in flicker noise after stress 
generation of traps
Similar voltage acceleration (G) of VT
(I-V), NIT (CP) and SVG (Noise)
Similar reduction of G for VT, NIT and
SVG with increase in N (trap generation
near interface)
0.7
field acceleration factor
6x10 t-stress=4000s
O
degradation
T=150 C
1
10 EOT=21.4AO
N=29%
VT (mV)
10
0
SVG x 10
NIT x 10
-1
4x10 6
7
-12
10
8
9
EOX (MV/cm)
2
V /Hz
cm
-2
0.6
Kapila, IEDM’08
VT
NIT
0.5
0.4
0.3
0.2
0.1
0.0
10
SVG
16
29
N% (atomic)
36
36
Direct Comparison of Multiple Measurements
Two measurement methods in
sequence to determine VT and
NIT during stress and recovery
Measured degradation (during
stress) depends on
measurement sequence
Measurement (stress off)
triggers recovery, captured
degradation depends on
measurement time and gate
voltage during measurement
Yang, VLSI’05
Less issue if measured long time
after stress is stopped, as
recovery goes in log-time scale
37
Comparison of CP and OTF-IDLIN (t0=1ms)
As measured difference ~ 10X  NBTI not due to trap generation?
Final difference within ~ 20%
VT & q.NIT/COX (V)
7x10
Band gap scan: Full for IDLIN,
partial near midgap for CP
-2
On-the-fly Idlin
n=0.15
CP
IDLIN
10
Correct for band gap difference
-2
C-P, n=0.26
10
PNO (29%, 2.14nm)
O
VG=-3.0V; T=150 C
-3
10
0
1
2
10
10
stress time (s)
10
Inherent recovery for CP
Stress
CP Meas.
Stress
3
Correct for recovery
Mahapatra, IRPS’07
38
Low Voltage (LV) SILC
Kimizuka, VLSI 00
Increase in gate leakage current after stress
Two peaks evolve with stress time at
VG~VFB (1V) and VG ~ 0V
SILC (~VFB) due to electron tunneling from
Si/SiO2 to SiO2/poly-Si interface traps
SILC (~0V) due to VB electron tunneling
from poly-Si to Si/SiO2 interface traps
LVSILC increase ~
Interface trap
generation
Stathis, IRPS’04
Krishnan, IEDM’05
39
Anomalous NBTI Degradation?
Chen IRPS’05
0
10
VT shift (V)
-1
10
Identical time exponent (n) at different
(lower) stress VG – “normal NBTI”
-VG(V)
4.50
5.25
5.50
-2
Increase in n at higher stress VG –
contribution from additional physical
process?
O
10
T=25 C
TPHY=36A
-3
10
-1
0
1
2
3
4
5
10 10 10 10 10 10 10
stress time (s)
Similar effect seen in thicker oxide
Mahapatra, IEDM’02
40
Anomalous NBTI – Bulk Trap Generation
VT shift (V)
SILC (%, VG=-4V)
-1
10
-2
10
VG=-4.5V
O
-3
10
-1
0
Increase in “n”
also seen for
high stress VB
2.0
VB(V)
0.0
4.0
5.0
T=25 C, TPHY=36A
1
2
3
4
10 10 10 10 10 10 10
stress time (s)
1.5
1.0
0.5
0.0
-1
5
0
1
2
3
4
10 10 10 10 10 10 10
stress time (s)
5
0
VT shift (V)
-1
10
-VG(V)
4.50
5.25
5.50
-2
SILC (%, VG=-4V)
10
O
10
T=25 C
TPHY=36A
2.0
1.5
1.0
0.5
0.0
-3
10
Higher n
coincides
with SILC
(~generation
of bulk oxide
traps)
2.5
-1
0
1
2
3
4
5
10 10 10 10 10 10 10
stress time (s)
-1
0
1
2
3
4
5
10 10 10 10 10 10 10
stress time (s)
Mahapatra, IEDM’02
41
Hot Hole Induced Generation of Bulk Traps
IB
IG
ISD
-2
NIT (cm )
O
O
1
10
10
0
10
10
SILC
Difference
9
2x10
-1
0
10
1
2
3
10
10
10
stress time (s)
4
10
2x10
-2
T=27 C TPHY=26A
VG=-3.1V
VB=0V
VB=2V
SILC (%, VG=-2V)
11
No recovery of enhanced
degradation for VB>0 stress
ISD
O
10
Increased n at VB>0, presence
of SILC, similar degradation of
SILC and enhanced degradation
O
8 T=27 C, TPHY=24A , VG=-3.1V
VB=2V
6
Difference
10
IG
VB >0
NIT (10 cm )
IB
HH generation at higher VG
reproduced by VB>0 at lower VG
4
2
VB=0V
Recovery: VG, VB=0V
0
Varghese, EDL Aug’05
0
1000 2000 3000 4000
stress / recovery time (s)
42
Summary
NBTI: Generation of interface traps, charging of pre-existing and
generated bulk traps
Differently processed devices show difference in pre-existing
bulk traps (Flicker noise on pre-stressed devices)
Interface / near interface and bulk trap generation signatures
shown by multiple measurements
Evidence of interface / near interface trap generation
from DCIV, high frequency charge pumping, LVSILC
Evidence of bulk trap generation from HVSILC
Several important factors need to be carefully considered if
attempts are made to compare multiple measurements
43
Outline
Introduction, Basic NBTI signatures
Fast / Ultra-fast drain current degradation measurement
Estimation of pre-existing and generated defects
Transistor process / material dependence
Go to Part – II
Role of Nitrogen – Study by Ultrafast measurement
Predictive modeling
Conclusions / outlook
44