Transcript Princess Sumaya Univ. Computer Engineering Dept. بســام كحـالــه . د Dr. Bassam Kahhaleh Princess Sumaya Univ. Computer Engineering Dept. Chapter 2:

Princess Sumaya Univ.
Computer Engineering Dept.
‫ بســام كحـالــه‬.‫د‬
Dr. Bassam Kahhaleh
Princess Sumaya Univ.
Computer Engineering Dept.
Chapter 2:
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Basic Computer Organization
The 5 Classic Components of a Computer
 The Basic Hardware/Software Interface
The Stored-Program Concept
6:27 PM
2 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Instructions
Assembly Language Instruction:
Perform:
a=b+c
ADD a, b, c
;ab+c
What are ‘a’, ‘b’ and ‘c’?
● The storage concept:
♦ Registers (R1, R2 …)
♦ Memory
 Sequence of Instructions:
Perform:
a = (b + c) – (d + e)
6:27 PM
3 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Instructions
Design Principle 1: Simplicity Favors Regularity
● Fixed number of operands
Simpler hardware
● Arithmetic operations on registers only
 Design Principle 2: Smaller is Faster
Small number of registers  faster hardware
● Fill registers with data
● Not enough registers to hold all data
6:27 PM
4 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Memory Operands
Data Transfer Instructions
● Memory Address (Location)
● Slower than registers
● Lower bandwidth than registers
Memory
0
1
2
•
•
● Keep commonly used data in registers
and avoid Spilling Registers.
 Load and Store Instructions
6:27 PM
5 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Operands
Design Principle 3: Make the Common Case Fast
● Constant operands:
Perform a = b + 4
•
•
21
Memory
22
•
•
4
b
● Immediate operands
6:27 PM
6 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Memory Access
8 bit
Memory
1 KB
•
•
21
4 KB
22
•
•
0001
 Address & Data
4301
1024
Height and Width
1 KB
16 Locations 
1 K Locations 
1 M Locations 
Read & Write
6:27 PM
7 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Stored Program Architecture
Memory
1024 x 32
Instructions
(Program)
Opcode
Operands
Operands
(Data)
Binary Operand
6:27 PM
8 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Memory Organization
Byte Access
 Word Access
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•
20 Byte
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20 Byte Byte
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20 Byte Byte Byte Byte
21 Byte
•
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22 Byte Byte
•
•
24 Byte Byte Byte Byte
•
•
6:27 PM
9 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Memory Organization
Mixed Access
● Little Indian
● Odd/Even
Alignment
•
•
20 Byte Byte
22 Byte Byte
•
•
MSB
DATA
BUS
LSB
6:27 PM
10 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Memory Organization
Mixed Access
● Alignment!
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•
20 Byte Byte Byte Byte
24 Byte Byte Byte Byte
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•
MSB
DATA
BUS
LSB
6:27 PM
11 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Instruction Representation
Instruction Format
Opcode
Operands
Assembly
Language
ADD R1, R2,
0101 0001 0010
5
1
Machine Language & Machine Code
47
00101111
2
2F
5122F
Machine
Language
Sequence of instructions
Design Principle 4:
Good Design Demands Good Compromises
6:27 PM
12 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Operations (Opcodes)
 Arithmetic
1 0 1 0 0 1 1 1
● Add, Sub, Mul, Div, Inc, Dec …
 Logic
1 0 1 0 0 1 1 1
● Shift
♦ Logical & Arithmetic
♦ Right & Left
● Bitwise AND, OR, XOR
● Complement (NOT)
6:27 PM
13 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Operations (Opcodes)
Shift Operation for Multiplication
● Multiply by 2
0 0 0 0 0 1 0 0
♦ Shift Left 1 bit
♦ Unsigned Binary
♦ 2’s Complement
1 1 1 1 1 1 0 1
● Multiply by 10
♦ BCD
0000 0100 1001
♦ Shift Left 4 bits
6:27 PM
14 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Control Instructions
 Making Decisions (Conditional Branches)
Perform if (i == j) then a = b + c else a = b – c
i == j ?
a=b+c
a=b–c
6:27 PM
15 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Control Instructions
Transferring Execution
● Unconditional Branch or Jump
● Call Subroutine
● Software Interrupt
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•
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6:27 PM
16 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Intel Architecture IA-32
Year
Microprocessor
Address Bits
Data Bits
Transistors
1971
4004
12
4
2,300
1974
8080
16
8
6,000
1978
8086
20
16/8
29,000
1982
80286
24
16/8
134,000
1985
80386
32
32/16/8
275,000
1989
80486
32
32/16/8
1,200,000
1992
Pentium
32
32/16/8
3,100,000
1995
Pentium Pro
32
32/16/8
5,500,000
1997
Pentium II
32
32/16/8
7,500,000
1999
Pentium III
32
32/16/8
9,500,000
2001
Pentium 4
32
32/16/8
42,000,000
2004
Pentium 4 EM64T
64
32/16/8
125,000,000
2008
Core 2 Quad
64
32/16/8
820,000,000
6:27 PM
17 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Intel Architecture IA-32
General-Purpose Registers (GPRs)
Also:
“Accumulator”
EAX
EAX AX AX
AL
“Base”
EBX
BX
BL
“Count”
ECX
CX
CL
“Division”
EDX
DX
DL
“String Source”
ESI
SI
“String Destination”
EDI
DI
 Segment Registers
CS
Segmented Memory Addressing
(Real Mode)
SS
DS
6:27 PM
18 / 19
Princess Sumaya University
22343 – Computer Organization & Design
Computer Engineering Dept.
Intel Architecture IA-32
Variable Length Instruction Format
6:27 PM
19 / 19
Princess Sumaya University
Chapter 2
22343 – Computer Organization & Design
Computer Engineering Dept.