Chapter # 3: Multi-Level Combinational Logic Contemporary

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Transcript Chapter # 3: Multi-Level Combinational Logic Contemporary

Combinational Logic : NAND – NOR Gates
CS370 – Spring 2003
Multi-Level Logic: Advantages
Reduced sum of products form:
x=ADF + AEF + BDF + BEF + CDF + CEF + G
6 x 3-input AND gates + 1 x 7-input OR gate (may not exist!)
25 wires (19 literals plus 6 internal wires)
A
D
F
A
E
F
B
D
F
B
E
F
C
D
F
C
E
F
G
1
2
3
4
5
7
x
A
B
C
1
D
E
2
3
4
x
F
G
Factored form:
6
x = (A + B + C) (D + E) F + G
1 x 3-input OR gate, 2 x 2-input OR gates,
1 x 3-input AND gate
10 wires (7 literals plus 3 internal wires)
Multi-Level Logic: Conversion of Forms
NAND-NAND and NOR-NOR Networks
DeMorgan's Law:
(A + B)' = A'  B';
Written differently: A + B = (A'  B')';
(A  B)' = A' + B'
(A  B) = (A' + B')'
In other words,
OR is the same as NAND with complemented inputs
AND is the same as NOR with complemented inputs
NAND is the same as OR with complemented inputs
OR/NAND NOR is the same as AND with complemented inputs
Equivalence
A
0
0
1
1
A
1
1
0
0
B
0
1
0
1
B
1
0
1
0
A +B
0
1
1
1
A B
0
1
1
1
A +B
1
1
1
0
AB
1
1
1
0
A
B
OR
A
B
OR
A
B
Nand
A
B
Nand
Mult-Level Logic: Conversion Between
Forms
AND/NOR
Equivalence
A
0
0
1
1
A
1
1
0
0
B
0
1
0
1
B
1
0
1
0
AB
0
0
0
1
A+ B
0
0
0
1
AB
1
0
0
0
A +B
1
0
0
0
A
B
AND
A
B
AND
A
B
NOR
A
B
NOR
Introduce appropriate inversions(“bubbles”)to convert from networks
with ANDs and ORs to networks with NANDs and NORs.
Each introduced "bubble" must be matched with a
corresponding "bubble“ to preserve logic levels
Multi-Level Logic: Conversion of Forms
Example: Map AND/OR network to NAND/NAND network
(A)
(B)
A
B
A
B
AND
OR
C
D
C
D
AND
A
B
NAND
NAND
(C)
(D)
A
B
NAND
C
D
NAND
NAND
C
D
NAND
Multi-Level Logic: Conversion of Forms
Example: Map AND/OR network to NAND/NAND network
NAND
NAND
A
A
B
B
Z
C
C
D
D
Equivalence of the
two forms can be verified
Z = [(A  B)' + (C  D)']'
= [(A' + B')+ (C' + D')]'
= [(A' + B')' (C' + D')']
= (A  B) + (C  D)
This is the easy conversion!
NAND
Z
Multi-Level Logic: Mapping Between Forms
Example: Map AND/OR network to NOR/NOR network
A
\A
NOR
\B
NOR
NOR
B
Z
Z
C
D
NOR
\C
\D
Step 1
Conserve
"Bubbles"
Equivalence
of the two forms can be verified
NOR
Step 2
Conserve
"Bubbles"
Z = {[(A' + B')' + (C' + D')']'}'
= {(A' + B') (C' + D')}'
= (A' + B')' + (C' + D')'
= (A  B) + (C  D)
This is the hard conversion!
AND/OR to NAND/NAND more natural
Multi-Level Logic: Mapping Between Forms
Example: Map OR/AND network to NOR/NOR network
A
A
NOR
B
B
NOR
C
C
NOR
D
D
Conserve
Bubbles
Equivalence
of the two forms Can be verified
This is the easy conversion!
Z
= [(A + B)' + (C + D)']'
= {(A + B)'}'  {(C + D)'}'
= (A + B) (C + D)
Multi-Level Logic: Mapping Between Forms
Example: Map OR/AND network to NAND/NAND network
Nand
Nand
Nand
Nand
Step 1
Conserve
Bubbles!
Nand
Step 2
Conserve
Bubbles!
Z = {[(A' B')'  (C' D')']'}'
Verify equivalence
of the two forms
= {(A' B') + (C' D')}'
= (A' B')'  (C' D')'
= (A + B) (C + D)
This is the hard conversion!
OR/AND to NOR/NOR more natural
Multi-Level Logic: More than Two-Levels
Conversion Example
A
B
C
A
F
X
D
(a)
B
C
F
X
D
(b)
Original circuit
Add double bubbles at inputs
A
X
A
B
C
F
\X
\D
(c )
B
C
F
\X
\D
Distribute bubbles
some mismatches
(d) Insert inverters to fix
mismatches