Transcript Single Frequency SAW Tag Example

Reflector Design for Orthogonal
Frequency (OFC) Coded Devices
D.C. Malocha, D. Puccio, and N. Lobo
School of Electrical Engineering & Computer Science
University of Central Florida
Orlando, Fl 32816-2450
Acknowledgements: Funding is provided through the NASA STTR grants with
industry partners of MSA and ASRD, and through the NASA Graduate
Student Research Program.
Magnitude (Linear)
Schematic
of OFC
SAW
ID Tag
Background:
OFC Bit
– 7chips/bit
0.8
0.6
f1
f4
f2
f6
f0
f5
f3
0.4
0.2
0
0
0.2
0.4
Piezoelectric Substrate
0.6
0.8
1
1.2
Normalized Frequency
1.4
1.6
1.8
1
Chip length
0.5
0
Bit Length
0.5
1
0
1
2
3
4
Normalized Time (Chip Lengths)
5
6
7
Approach
• Study a methodology to optimize reflective
structures for OFC devices
– Minimize device insertion loss
– Find optimum values for bit length, chip
length, and strip reflectivity as a function of
device fractional bandwidth
– Maintain processing gain
– Minimize ISI effects
Boundary Conditions for Analysis
• Assume only a single in-line grating
analysis.
• Assumes no weighting within each
reflective region which composes a chip.
• First order assumptions are made to
understand the phenomenon and then
verified by COM models and simulation.
• Multiple parallel tracks can be approached
in a similar manner.
SAW OFC Reflector Coding
• Ideal OFC code using a SAW reflective structure
assumes that the ideal chip can be accurately
reproduced by a reflector
– Chip frequency response: Sin(x)/x
– Chip time response: Rect(t/ chip)
– Uniform amplitude of chips for maximum coding,
processing gain (PG) and correlation output
Intra-chip & Inter-chip Reflector
Considerations
•
•
•
•
•
•
Chip reflector uniformity
Processing gain
Coding diversity
Orthogonality of chips
Frequency & time domain distortion
Intersymbol interference (ISI)
OFC Reflector Bank Uniformity
fc * c  Nc
f1
c  constant
f4
f2
f6
f0
f5
f3
OFC Reflector Responses
0
fc=chip
frequency
determined by
orthogonality
Reflection Magnitude (dB)
-5
-10
-15
-20
-25
-30
-35
0.8
0.85
0.9
0.95
1
1.05
1.1
1.15
1.2
Normalized Frequency
As fc increases, Nc increases and chip
reflectivity increases
Response of Reflector Test Structure
0.5
-10
Measured response
Predicted-fit
Direct SAW
response
-20
0.4
Reflector
response
-30
|R|
dB (s21)
0.3
-40
-50
0.2
-60
0.1
-70
0
64
65
66
67
Frequency ( MHz )
68
69
-80
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Time (s)
Under proper conditions, a SAW reflector looks similar to a
Sampling function in frequency and a Rect function in time.
Reflectivity is a function of the substrate and reflector
material, reflector film thickness, substrate coupling coefficient
and line-to-width ratio. The reflector width is approximately
the chip length. How approximate is it???
Simulation of a reflector grating frequency response for
1% reflectivity per strip, and 4 different grating lengths.
Ng equals the number of reflective strips in each grating.
0
Magnitude (dB)
10
Ng=25,
Ng=50,
Ng=100,
Ng=200,
For Ng*r small,
reflector response
looks like sin(x)/x
Ng*r=0.25
Ng*r=0.5
Ng*r=1.0
Ng*r=2.0
20
30
40
50
0.9
0.93
0.97
1
Normalized Frequency
1.03
1.07
1.1
Plot of magnitude of reflectivity
versus the product of the number of
strips and reflectivity per strip (Ng.r).
For small reflector loss, chip reflectivity, Ng.r,
should be large but for reasonable sin(x)/x
frequency response, Ng.r product should
definitely be less than 2.
OFC Adjacent Frequency Reflection
• OFC yields reduced reflections between
reflectors compared to single frequency
PN due to orthogonality
• Non-synchronous orthogonal frequencies
are partially reflected
• The closer the adjacent frequency chips
the greater the partial reflection
• Must understand non-synchronous
reflectivity for all chips
Adjacent Frequency Reflection
• Assume an RF burst near
fo as interrogation signal
• Very small reflection of
incident adjacent
frequency RF burst from
weak reflector
• Large adjacent frequency
reflection from strong
reflector
• Transmission through the
reflector bank can be
compromised if chip
reflectivity is too large
which causes energy
rolloff for trailing chips.
1
Reflected Pulse Response
Reflector Response
RF Burst Response
0.8
0.6
Small
Reflectivity
0.4
0.2
0
-0.2
-0.4
0.8
0.85
0.9
0.95
1
1.05
Normalized Frequency
1.1
1.15
1.2
1
Large
Reflectivity
0.8
0.6
0.4
0.2
0
-0.2
Reflected Pulse Response
Reflector Response
RF Burst Response
-0.4
-0.6
0.985
0.99
0.995
1
1.005
Normalized Frequency
1.01
1.015
Frequency Transmission vs Reflectivity
as a Function of Frequency Offset
fSAW is the synchronous
reflector of interest
fn
is a prior asynchronous
reflector in bank
High center frequencies
1
0.9
0.9
Transmission coefficient, T
adj
Transmission coefficient, T
adj
Low center frequencies
1
0.8
0.7
0.6
0.5
0.4
0.3
-1
0.2
fref = f0 - 1
0.1
fref = f0 - 2-1
0
0
fref = f0 - 3-1
2
rNg
4
6
For 90%
transmission,
r*Ng<2
0.8
0.7
0.6
0.5
0.4
0.3
0.2
fref = f0 + 1-1
0.1
fref = f0 + 2-1
0
0
fref = f0 + 3-1
2
rNg
4
6
• COM simulations used to determine non-synchronous reflector
transmission coefficient
• Analysis performed for reflector center frequencies 1,2,3 orthogonal
frequencies higher and lower than incident wave
Adjacent Frequency Reflector
Transmission Example
f7
f6
f5
f4
f3
f2
f1
f3
f6
f4
f7
f1
f5
f2
Reflectors
SAW
Substrate
Interrogation
Frequency
Adjacent
Frequency
Interactions
1
2
3
4
5
6
7
Sum
0
2
0
1
2
0
1
6
Independent of the OFC
frequency code sequence, the
sum of the adjacent frequency
interactions is always equal to
Nf-1, but the interactions for a
given frequency is code
dependent.
Total Reflected OFC Power
- Simple Model
Equations defined to relate several OFC reflector bank
parameters, (approximate and empirically derived)
2b  2
4b 4
2
– Ptot= total output

Ptot   R0  1  R0 
 Tadj
 1   N f  1  Tadj

power
b 1
– Tadj=adjacent center
frequency
1.437 tanh 2 0.3771 r  N g  r  N g  2
transmission



1.4
– Ro=chip reflectivity R0  
2 
r  Ng  2
 tanh 0.3771 r  N g  
– r= electrode

reflectivity
2
r

N


g
Nf
 

– Ng= # of reflector
Ng 
 6.231 
Tadj  e
chip electrodes
% BW
– Nf= # of frequencies
B
Example Reflected Power Prediction
-2
Reflected Power (dB)
• 10% bandwidth
• 2% electrode
reflectivity
• No repeated
frequencies
• Predictions compared
with COM simulations
• Large variations
caused by multireflection interference
0
-4
-6
-8
-10
-12
-14
-16
0 (0mm)
Predicted reflection using equation
Predicted reflection using COM simulation
5 (0.44mm)
10 (1.74mm)
15 (3.92mm)
20 (6.98mm)
25 (10.9mm)
Number of Frequencies (1 GHz bank size on YZ lithium niobate)
Approximate analysis and
COM model agree well for
Nf<10. Optimum reflected
power for 10<Nf<15.
Optimal Reflection Coefficient
Reflected Power (%) for BW=10%
30
60
25
50
20
40
15
30
20
10
10
5
0.5
1
1.5
2
2.5
Strip Reflectivity (%)
3
30
Number of Frequencies
Number of Frequencies
Reflected Power (%) for BW=5%
50
25
40
20
30
15
20
10
10
5
0.5
1
1.5
2
2.5
3
Strip Reflectivity (%)
Colors represent reflectivity, white is maximum reflected power
• Reflected power for 5% and 10% fractional bandwidths
• Optimal empirically derived relationship for # of frequencies
(Nf), strip reflectivity (r) and %BWbit:
Nf  2.6 * %BWbit / r
• Total reflected power is maximized for R0 ~ 80%
Reflector Test Structure Time Response
-10
Direct SAW
response
-20
Reflector
response
dB (s21)
-30
-40
-50
-60
-70
-80
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Time (s)
How approximate is the time domain
reflector compared to a Rect function???
Simulation of a SAW grating time response for
1% reflectivity and 4 different grating lengths.
1
Magnitude
Ng=25,
Ng=50,
Ng=100,
Ng=200,
Ng*r=0.25
Ng*r=0.5
Ng*r=1.0
Ng*r=2.0
Time scale is normalized
to reflect the number of
wavelengths at center
frequency
0.5
0
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
2.75
As Ng*r increases:
3
1. Impulse response
length of reflector
increases beyond desired
chip -ISI
Relative time (Normalized to Ng*r)
Magnitude (dB)
0
Ng=25,
Ng=50,
Ng=100,
Ng=200,
Ng*r=0.25
Ng*r=0.5
Ng*r=1.0
Ng*r=2.0
2. Energy leakage
beyond desired chip
increases- energy loss
20
40
0
0.25
0.5
0.75
1
1.25
1.5
1.75
Relative time (Normalized to Ng*r)
2
2.25
2.5
2.75
3
Ng*r=1 appears to
be maximum for
acceptable ISI
Chip Correlation with Synchronous
Interrogator Pulse
Magnitude (dB)
0
Correlation is
greater than
ideal, IR length is
near ideal and
sidelobes are
low.
Correlation for Ng*r=.25
Ideal Correlation
10
20
30
40
50
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Relative Time (Normalized to Ng*r)
Magnitude (dB)
0
Correlation is
greater but
sidelobes
apparent due to
intra-chipreflections
Correlation for Ng*r=1.0
Ideal Correlation
10
20
30
40
50
3
2
1
0
1
Relative Time (Normalized to Ng*r)
2
3
Chip Correlation with Adjacent Frequency
Asynchronous Interrogator Pulse
Magnitude (dB)
0
Near ideal
response.
Correlation for Ng*r=.25
Ideal Correlation
10
20
30
40
50
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Cross correlation
shows null at chip
center, as
expected due to
OFC properties.
Relative Time (Normalized to Ng*r)
Magnitude (dB)
0
Correlation for Ng*r=1.0
Ideal Correlation
10
20
30
40
50
3
2
1
0
1
Relative Time (Normalized to Ng*r)
2
3
Cross correlation
shows reduced
null at chip center,
and trailing
correlation
sidelobe
distortion.
Measured Device Example
•
•
•
•
•
•
•
fo= 250 MHz
%BW=28%; BW=69 MHz
YZ LiNbO3, k2=.046, r~3.4%
(# frequencies) = (# chips) =7
# of reflectors at fo = 24
c ~ 98 nsec
Ng*r ~ .72
Chip reflector loss~4dB

COM Simulation versus Experimental
Results – Time Domain Reflections
f3
f5
f0
f6
f2
f4
f1

f1
f4
f2
f6
f0
f5
f3

Piezoelectric Substrate
Dual delay OFC
device having two
reflector banks and
7 chips/bank
For Ng*r ~ .72, chips are
clearly defined, ISI is
minimal, predictions and
measurements agree
well
COM Predictions
Experimental Measurement
f0
f6
f2
f4
f1

f1
f4
f2
f6
f0
f5
f3

Piezoelectric Substrate
Dual delay OFC
device having two
reflector banks and
7 chips/bank
For Ng*r ~ .72, ideal, COM
predictions, and
experimentally measured
autocorrelation results
agree well
Magnitude (dB)
f5
Magnitude (dB)
f3
Magnitude (dB)
COM Simulation versus Experimental
Results - Correlation
Ideal Compressed Pulses
-20
-30
-40
-50
4
6
8
10
12
14
16
18
Time Normalized to a Chip Length
Simulated Compressed Pulses
-20
-30
-40
-50
4
6
8
10
12
14
16
18
Time Normalized to a Chip Length
Experimental Compressed Pulses
-20
-30
-40
-50
4
6
8
10
12
14
16
Time Normalized to a Chip Length
18
General Results and Conclusions
• Various OFC chip criteria were investigated to provide
guidance in choosing optimal design criteria.
• The ISI and pulse correlation distortion appear to be a
limiting or controlling factor for maximizing the chip
reflectivity and suggests Ng*r<1.
• For Ng*r=1, chip reflector loss is approximately 2.5 dB.
• Based on reflective power predictions and simulations, the
largest number of chip frequencies should be between 10
and 15, with the precise number of frequencies dependent
on the bit fractional bandwidth and strip reflectivity.