Transcript Real-Time Speech Pitch Shifting on an FPGA

Real-Time Speech Pitch
Shifting on an FPGA
Habib Estephan
Scott Sawyer
Dan Wanninger
Dr. Kevin Buckley, Advisor
Project Objective
To design and implement a high
quality speech pitch shifter on an
FPGA that allows real-time
microphone input and speaker
output.
Digital Signal Processing
and FPGAs
• Improved performance and flexibility
over DSPs and other dedicated
microprocessors
• More economical than custom ASICs
for low-cost or low-volume
applications
• Abstract design tools significantly
simplifiy programming over
conventional HDLs
SSB Frequency Shifting
Spectrum of Frequency Shifted Signal
1
Filtered Signal
Shifted Signal
0.9
0.8
0.7
Relative Power
• Single sideband
frequency shifting is a
linear shift of the
spectral components
of a signal using the
Hilbert Transform.
• It does not preserve
the harmonic nature
of sound, and the
result is of low quality.
0.6
0.5
0.4
0.3
0.2
0.1
0
-4000
-3000
-2000
-1000
0
1000
Frequency, Hz
2000
3000
4000
Time Domain Algorithm
• Synchronized Overlap-Add Method
(SOLA)
• Pitch estimation is required to identify
individual periods
• Inserting/Removing periods in order to
stretch/compress signal
• Resampling restores the original length
while altering the pitch
Time Domain Algorithm
Sample Audio:
•Original
•Up Shifted
•Down Shifted
Time Domain Algorithm
Frequency Domain Algorithm
• Windowed FFTs taken and IFFTs
offset to time shift input
• Phase terms adjusted to remove
discontinuities
• Time shifted signal resampled to
alter pitch
• Higher fidelity but increased
complexity
Frequency Domain Algorithm
Sample Audio:
•Original
•Up Shifted
•Down Shifted
Simulink and Xilinx System
Generator
Up Pitch Shifter
Achievements and Deliverables
• Two high fidelity algorithms simulated
in MATLAB
• Successful real-time FPGA
implementations of the time domain
approach