Transcript Smart Dust Proposal Input

Digital Processing Platform
 Low power micro-controller
 Small size for compact integration
 Enables adaptation of node behavior with changing
requirements, environmental characteristics, and network state
 Enables experimentation with different algorithms and protocols
 Enables use of energy saving processor modes and associated
operating system functionality
 Development of streamlined software implementations
 Highly memory-constrained software implementations are
required due to size and energy constraints
 Leverage our previous work in synthesis of memory-efficient
embedded software implementations
 Employ formal programming models, and apply graph-theoretic
analysis and optimization of program structure
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Smart Dust Digital Processing, 1
Example of Software Structure
No new data
Low power
sleep mode
Periodic wake-up
Check for
new data
No
Broadcast
new data
Yes
Extract data
Need to
update
neighbors?
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Fuse with
prior data
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Task Assignment Algorithms
 Need to balance communication and computation
throughout the network
 Develop models of power consumption in network nodes
and communication links
 Develop task graph models of overall network
functionality
 Develop algorithms to embed task graph algorithm
specifications into the network
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

Assign processing tasks to network nodes
Turn off idle nodes
Large design space
 Explore evolutionary algorithms to optimize task graph
embeddings
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Smart Dust Digital Processing, 3
Evolutionary Algorithms
Selection
Phenotype space
(Original search space)
P(t+1)
P(t)
Decoding function
Genetic
operators
Genotype space
(Genetic representation)
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G(t+1)
G(t)
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References: selected prior work related to
embedded software optimization
 N. K. Bambha, S. S. Bhattacharyya, J. Teich, and E. Zitzler.
Systematic integration of parameterized local search in evolutionary
algorithms. IEEE Transactions on Evolutionary Computation. To
appear.
 S. S. Bhattacharyya. Hardware/software co-synthesis of DSP
systems. In Y. H. Hu, editor, Programmable Digital Signal
Processors: Architecture, Programming, and Applications, pages
333-378. Marcel Dekker, Inc., 2002.
 P. K. Murthy and S. S. Bhattacharyya. Shared buffer implementations
of signal processing systems using lifetime analysis techniques.
IEEE Transactions on Computer-Aided Design of Integrated Circuits
and Systems, 20(2):177-198, February 2001
 S. S. Bhattacharyya, R. Leupers, and P. Marwedel. Software
synthesis and code generation for DSP. IEEE Transactions on
Circuits and Systems --- II: Analog and Digital Signal Processing,
47(9):849-875, September 2000.
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