Transcript Digital Design: From Gates to Intelligent Machines

Elementary
Combinational Circuits
Introduction
Combinational circuits are built from logic gates
Can realize arbitrary logical functions
Goal is to design efficient circuits
Also must keep in mind “extra-logical” properties
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Elementary
Combinational Circuits
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C
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Gates and corresponding truth tables
Gate
Symbol
Truth Table
P1
0
1
NOT
Name
OR
AND
NAND
NOR
XOR
P1
0
0
1
1
P1
0
0
1
1
P1
0
0
1
1
P1
0
0
1
1
P1
0
0
1
1
P2
0
1
0
1
P2
0
1
0
1
P2
0
1
0
1
P2
0
1
0
1
P2
0
1
0
1
P1'
1
0
P1 + P2
0
1
1
1
P1

P2
0
0
0
1
P1 NAND P2
1
1
1
0
P1 NOR P2
1
0
0
0
P1 XOR P2
0
1
1
0
Elementary
Combinational Circuits
Gates perform the indicated logical transformation
But, can also look at gates as filters acting on data streams
ctrl
signal
If control signal is 1, then AND gate will let signal pass through,
If control signal is 0, then output is always 0
ctrl
signal
If control signal is 1, then OR gate produces 1
If control signal is 0, then output is signal
ctrl
signal
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C
D
Elementary
Combinational Circuits
Circuits to functions
P
Q
R
(() + ())
((P NAND Q) + ())
((P NAND Q) + (R'))
Circuit equivalent to:
P
Q
R
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D
Elementary
Combinational Circuits
Circuits to functions (cont.)
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B
C
D
1) (() XOR ())
2) ((() () ())' XOR ())
3) (((A + B) (C) (D'))' XOR ())
4) (((A + B) (C) (D'))' XOR (CD))
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B
C
D
Elementary
Combinational Circuits
Circuits to truth tables (directly)
00001111
P
Q 00110011
R
00000011
11111100
11111110
01010101
10101010
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B
C
D
Elementary
Combinational Circuits
Functions to circuits (direct)
[(A + B)(C)(D')]' XOR [CD]
A
XOR
+
NAND
XOR
D' C
D' C
C
C
+
B
*
NAND
D
*
B
D
A
A
B
C
D
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B
C
D
Elementary
Combinational Circuits
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C
D
Functions to circuits (through minterms)
P
0
0
0
0
1
1
1
1
Q
0
0
1
1
0
0
1
1
R
0
1
0
1
0
1
0
1
(PQ)' + R'
1
1
1
1
1
1
1
0
minterm
P'Q'R'
P'Q'R
P'QR'
P'QR
PQ'R'
PQ'R
PQR'
PQR
maxterm
P+Q+R
P + Q + R'
P + Q' + R
P + Q’ + R'
P' + Q + R
P' + Q + R'
P ' + Q' + R
P' + Q’ +R'
(P'Q'R' + P'Q'R + P'QR' + P'QR + PQ'R' + PQ'R + PQR')
P
Q
R
Elementary
Combinational Circuits
Functions to circuits (through maxterms)
P
0
0
0
0
1
1
1
1
Q
0
0
1
1
0
0
1
1
R
0
1
0
1
0
1
0
1
(P' + Q' + R')
P
Q
R
(PQ)' + R'
1
1
1
1
1
1
1
0
minterm
P'Q'R'
P'Q'R
P'QR'
P'QR
PQ'R'
PQ'R
PQR'
PQR
maxterm
P+Q+R
P + Q + R'
P + Q' + R
P + Q’ + R'
P' + Q + R
P' + Q + R'
P ' + Q' + R
P' + Q’ +R'
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B
C
D
A
B
Elementary
Combinational Circuits
C
D
NAND and NOR representations of SOP and POS circuits
Sum of Products
Product of Sums
1) step 1 justification
bubbles cancel
1
1
2) step 2 justification
generalized DeMorgan

2
2

Elementary
Combinational Circuits
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C
D
Realizing minimal circuits
[(A + B)(C)(D')]' XOR [CD]
SABCD(0,1,2,4,5,8,9,12,13)
AB
00
CD
01
11
PABCD(3,6,7,10,11,14,15)
AB
00
CD
10
1
00
1
1
1
1
01
1
1
1
1
C'
01
11
10
00
1
1
1
1
01
1
1
1
1
1
(C' + D') 11
11
10
1
10
2
A'B'D'
C
A
B
D
A
B
C
D
1
2
3
(B' + C')
(A' + C')
Elementary
Combinational Circuits
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B
C
D
Gates and Integrated Circuits (IC’s) in practice
Logic families
Technology
Date
Relays
1930’s
Vacuum Tubes
1940’s-1950’s
TTL IC’s
1960’s-1990’s
CMOS IC’s
1990’s-present
Elementary
Combinational Circuits
A
B
C
D
Gates and Integrated Circuits (IC’s) in practice
Values and voltages
Binary
VCC
0.7 VCC
High Noise
Margin
Ternary
VOHmin
VCC
undefined
VIHmin
undefined
0.3 VCC
0
Low Noise
Margin
High Margin
Middle Margin
VILmax
VOLmax
undefined
0
Low Margin
Elementary
Combinational Circuits
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B
C
D
Gates and Integrated Circuits (IC’s) in practice
Fan-in and fan-out
Fan in is limited for CMOS gates
Workaround
(ABC)' + (DEF)' ≡ (A' + B' + C' + D' + E' + F') ≡ (ABCDEF)'
Propagation time proportional to fan-out
soft and hard constraints
Elementary
Combinational Circuits
A
B
C
D
Gates and Integrated Circuits (IC’s) in practice
Gate delays
high voltage
VIN
low voltage
high voltage
VOUT
low voltage
tpHL
tpLH
time
i) rise and fall times not instantaneous
ii) outputs lag inputs
ii) tpLH not in general equal to tpHL
Elementary
Combinational Circuits
A
B
C
D
Gates and Integrated Circuits (IC’s) in practice
Transistor implementation of gates
NAND gate
AND gate
VDD
VDD
p-channel
p-channel
inverter
p-channel
p-channel
out
p-channel
out
in1
(low)
n-channel
in1
(low)
n-channel
in2
(low)
n-channel
in2
(low)
n-channel
n-channel
Elementary
Combinational Circuits
A
B
C
D
Summary of topics
Gates
Gates as filters
Circuits to functions
Circuits to truth tables
Functions to circuits (direct)
Functions to circuits through minterms and maxterms
NAND and NOR realizations of SOP and POS functions
Gates and circuits in practice
Logic families
Values and voltages
Fan-in and fan-out
Gate delays
Transistor implementations of gates