KOMPIUTERIŲ ARCHITEKTŪRA (Vak)

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Transcript KOMPIUTERIŲ ARCHITEKTŪRA (Vak)

COMPUTER ARCHITECTURE
(Simulation at algorithm level
using SMALL)
Assoc.Prof. Stasys Maciulevičius
Computer Dept.
[email protected]
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Algorithm description (an example)
 Suppose we want to describe a structure for
multiplication of positive integers at algorithm
level
 Operands are 6 bit long, integer number’s format is:
S
1
A
2
6
 S – sign bit,
A – value field (5 bits)
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Multiplication using shift of
multiplicand (from lsb)
 Let us multiply the integers 25 and 19: 25 × 19 = 475
 In binary system: 0.11001× 0.10011 = 0.0111011011
 Manual multiplication looks so:
0.11001
× 0.10011
011001
011001
011001
0111011011
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Multiplication using shift of
multiplicand (from lsb)
 We start multiplication from least significant bits
and use shift of multiplier (B)
 Therefore, we expand the multiplicand (A) to
double length adding zeros on the left:
A
B
0.0000011001
0.10011
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Multiplication using shift of
multiplicand (from lsb)
A
0.0000011001
0.0000110010
0.0001100100
0.0011001000
0.0110010000
0.1100100000
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B
C
0.10011 0.0000000000
+0.0000011001
0.01001 0.0000011001
+0.0000110010
0.00100 0.0001001011
0.00010 0.0001001011
0.00001 0.0001001011
+0.0110010000
0.00000 0.0111011011
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Multiplication using shift of
multiplicand (from lsb)
 You see, we shift the multiplicand (A) to left, and
multiplier (B) – to right (by one bit at time)
 If the least significant bit of B is 1, the multiplier (A)
should be the added to partial sum of products (C)
 Cycle is carried out as many times as multiplier
length is (5 in our case)
 We use 3 bit cycles counter
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Multiplication using shift of
multiplicand (from lower bits)
 Considering these circumstances, we have such
an algorithm:
1. Input the multiplicand and multiplier values
2. Clear partial sum of products and set cycle counter
to 5
3. Check the lsb of multiplier. If it is equal to 1, add
multiplicand (A) to the partial sum of products (C)
4. Shift multiplicand to the left, and the multiplier (B) –
to the right
5. Decrease cycle counter. If the counter unequal to
zero, return back to step 3
6. End
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Small


We will use a simple, similar to C, a
hardware description language Small
Key elements of Small will be presented
using examples in next slides
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Small – numbers and names
 Numbers: 181d =10110101 = 0B5h
Binary numbers are presented without
indicator of number system
 Names: A, A1, a1. Names are case-sensitive
 First symbol of reserved words (excluding if)
is capital letter: Reg, Cnt
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Small - declarations
 Types of structure elements: Reg - register,
Cnt - counter, Trg - trigger, Examples:
 Reg A[8], B[8], c[16], z[1]; - here are 8 bit
registers A and B, 16 bit register c and 1 bit
register z (equivalent to Trg z;) declared
 Cnt Sk[3]; - here is 3 bit counter Sk (it can count
from 0 to 7 or vice versa) declared
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Small - variables
 Examples of variables (they are declared as
above):




A
- 8 bit register A (whole)
A[8] - 8’th bit of register A
B[5:8] – four right bits of register B
A.B - word composed using concatenation of
registers A and B (complex variable)
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Small - expressions
 Logic operations: & - AND, | - OR, # - EXOR
 Examples of expressions (variables are declared as
above):
 A+B
- sum of two 8 bit registers A and B
 c[1:8] + A - A is added to higher part of register c
 c[1:8] + ^A + 1 - (-A) is added to higher part of register c
(using two’s complement code)
 A|B
- OR (logical sum) of 8 bit registers A and B
 A[1] #B[1] - EXOR (sum module 2) of first bits (sign
bits) of registers A and B
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Small - shifts
 Shift operators: RLS - log. shift to right, LLS log. shift to left, RCS – rotating to right, LCS rotating to left, RAS - arithmetic shift to right
 Examples of shift operations (variables are
declared as above):
 RLS(A) or A = 0.A[1:7] - logical shift to right of
register’s A content
 LLS(A.B) or A.B = A[2:8].B.0 - logical shift of
registers’ A and B contents to left, when higher
B bit will be “inserted” into A
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Small - conditional statements
 Syntax of conditional statements:
< conditional operator> ::=
if <logic expression> {
< list of operators>
} [ELSE {
< list of operators>
}]
 Example of conditional statement:
if b[6]==1 {
c=c+a;
}
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Small
 Every statement ends by a semicolon (;)
 Don’t write a semicolon after BEGIN, END !
 Basic words and standard names are not
case-sensitive
 Names of structure elements should be
written so, as they were declared (they are
case-sensitive)
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Multiplication algorithm in Small
 This multiplication algorithm can be presented as
description of multiplication unit:
Unit Multiplication;
Reg a[11], c[11];
Reg b[6];
Cnt sk[3];
Begin
a=input;
b=input;
Print a,b;
sk=5d;
Print “Start of Cycle";
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Multiplication algorithm in Small
 Continued:
Loop:
if b[6]==1 {
c=c+a;
}
a = LLS(a);
b = RLS(b);
sk = sk-1;
Print sk, a, c;
if sk<>0 {
Goto Loop;
}
Print c;
End
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Small window
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Simulation using Small2W
 When you click Run, program ask to enter
operands:
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Simulation using Small2W
 Simulation protocol:
Unit Multiplication
a[1:11]=00000011001 b[1:6]=010011
"Start of Loop"
sk[1:3]=100 a[1:11]=00000110010 c[1:11]=00000011001
sk[1:3]=011 a[1:11]=00001100100 c[1:11]=00001001011
sk[1:3]=010 a[1:11]=00011001000 c[1:11]=00001001011
sk[1:3]=001 a[1:11]=00110010000 c[1:11]=00001001011
sk[1:3]=000 a[1:11]=01100100000 c[1:11]=00111011011
c[1:11]=00111011011
 Result C = 00111011011 = 475
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Simulation using Small2W
 Program checks, if a carry out will be generated. If it can be
ignored, you can do in such a way: descibe one bit length
register and write this carry into this register
 For instance:
c=c+a produces such result:
c[1:8]=11100111 a[1:8]=11001100
Calculation result is too big to save it to `c` at line 27
Then we can improve our program in following way:
Reg x[1];
x.c = c + a;
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