Transcript Document
A 900MHz Doherty Amplifier
Implemented with Lumped Elements
Y. Zhao, M. Iwamoto, D. Kimball, L. Larson, P. Asbeck
University of California, San Diego
Introduction
To increase overall efficiency of RF PA
Use Doherty structure
To shrink circuit size for integration
Use lumped elements to replace transmission lines
To achieve good linearity
Use DSP to control Doherty Amplifier
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Agenda
Doherty amplifier architecture
Doherty with lumped elements
Design issues
Simulations
Measurements
DSP application in Doherty amplifier
DSP control mechanism
Measurement Results
Conclusions
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Doherty Architecture
Low power range
only Main-PA operates
High power range
Main-PA goes into
saturation
Aux-PA turns on
Load-line of main amplifier
Iout
High power
operation
Low power
operation
Vout
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Lumped Doherty --- Design issues
Size of 90° transmission line
900M --- 48mm
2.4G --- 19mm
Er = 3.48
5.2G --- 8.7mm
Size of a general PA package
4mm x 4mm
Design requirements
Zin
Zl
Impedance inversion
Phase compensation
Zin K 2 / Zl
K L 1 / C
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Lumped Doherty --- Design issues
C-L-C (9.1pF, 2.7nH)
Impedance inverter
90 degrees delay
Provide VDD to Aux-PA
Harmonic trap
L-C-L (1.8nH, 15pF, 3.3nH)
90-degree phase shifter
part of the matching
DC block
L-match (13pF, 2.2nH)
Output impedance match
DC block
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Lumped Doherty --- Measurement
A GaAs MESFET-based hybrid Doherty
amplifier was built with lumped elements
Drain efficiency, PAE and Gain
Bandwidth
S21
1dB/div
1dB Bandwidth ~ 110MHz
CDMA needs 25MHz/836MHz
Frequency
50MHz/Div
802.11b,g need 83MHz/2.44GHz
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Lumped Doherty --- Measurement
PAE vs. Pout
Lumped Doherty vs.
a simulated Class AB
PAE average
IS-95 CDMA PDF
Pout Pin
Pdiss
Lumped Doherty – 14.1% > 3X Class AB – 4.4%
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Comparison --- Lumped and distributed
Similar PAE performance
Slightly narrower bandwidth
for lumped Doherty
ADS simulation
Same devices and design
Check 1dB bandwidth/900MHz
the lumped Doherty 130MHz
the distributed Doherty 150MHz
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Comparison --- Lumped and distributed
Size reduction by using lumped elements is dramatic
Connection lines and components in hybrid circuit
can be further shrunk
in a IC module
schematic
Circuit area
Quarter-wave lines
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Potential problem --- Linearity
60
0
50
-10
40
-20
30
-30
20
-40
10
-50
0
ACPR (dBc)
For CDMA signal, ACPR may
not be good enough
PAE (%)
Non-ideal gain and phase in high
power region can cause a linearity
problem
-60
5
10
15
20
25
30
Average Power (dBm)
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DSP Linearization Strategy
Gain control
System block diagram
Change Vgg2 according to the
instantaneous envelope of the
input CDMA signal
Phase control
Baseband phase predistortion
Open loop control with
lookup table
“Doherty Amplifier with DSP Control to Improve Performance in CDMA Operation,”
2003 IEEE MTT-S Digest, p687-690
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60
20
-20
50
18
-30
16
40
14
30
12
20
10
ACPR (dBc)
uncorrected
Gain (dB)
PAE (%)
Measurement --- linearized IS-95 signal
DSP corrected
-40
-50
-60
-42dBc
-70
10
8
0
6
-80
5
10
15
20
25
30
Average Power (dBm)
High efficiency is maintained
5
10
15
20
25
10dB/Div
uncorrected
ACPR improvement of up to
9dB is achieved; CDMA ACPR
specifications are met
Peak power is limited by the
device size
30
Average Power (dBm)
DSP corrected
0.5MHz/Div
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Conclusions
Conclusions
Doherty amplifier helps achieve high efficiency over wide
output power range
Doherty amplifier with lumped elements shrinks circuit
size while maintaining good performance
Linearity of the Doherty amplifier can be substantially
improved by DSP to meet the CDMA ACPR specification
A promising approach for CDMA handset and other
wireless applications such as 802.11
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