Transcript Chapter 2 - Part 1 - PPT - Mano & Kime

Logic and Computer Design Fundamentals
Chapter 2 – Combinational
Logic Circuits
Part 2 – Circuit Optimization
Overview
 Part 2 – Circuit Optimization
2-4 Two-Level Optimization
2-5 Map Manipulation
2-6 Pragmatic Two-Level Optimization (Espresso)
2-7 Multi-Level Circuit Optimization
Chapter 2 - Part 2
2
Circuit Optimization
 Goal: To obtain the simplest
implementation for a given function
 Optimization is a more formal approach
to simplification that is performed using
a specific procedure or algorithm
 Optimization requires a cost criterion to
measure the simplicity of a circuit
 Distinct cost criteria we will use:
• Literal cost (L)
• Gate input cost (G)
• Gate input cost with NOTs (GN)
Chapter 2 - Part 2
3
Literal Cost
 Literal – a variable or it complement
 Literal cost – the number of literal appearances
in a Boolean expression
corresponding to
the logic circuit
diagram
 Examples:
• F = AB+C(D+E)
• F = AB+CD+CE
• Which solution is best?
L=5
L=6
G  ABCD  A B C D
L 8
G  ( A  B)(B  C )(C  D)(D  A)
L 8
Which is best? The same complexity?
Chapter 2 - Part 2
4
Gate Input Cost
 Gate input costs - the number of inputs to the gates in the
implementation corresponding exactly to the given equation or
equations. (G - inverters not counted, GN - inverters counted)
 For SOP and POS equations, it can be found from the equation(s)
by finding the sum of:
• all literal appearances
• the number of terms excluding single literal terms,(G) and
• optionally, the number of distinct complemented single literals (GN).
 Example:
G  ABCD  A B C D
G  8  2  10, GN  8  2  4  14
G  ( A  B)(B  C )(C  D)(D  A)
G  ? GN  ?
• Which solution is best?
Chapter 2 - Part 2
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Cost Criteria (continued)
 Example 1:
GN = G + 2 = 9
L=5
 F= A+BC + BC
G=L+2= 7
B
C
A
F
 L (literal count) counts the AND inputs and the single
literal OR input.
 G (gate input count) adds the remaining OR gate inputs
 GN(gate input count with NOTs) adds the inverter inputs
Chapter 2 - Part 2
6
Cost Criteria (continued)
 Example 2:




A
B
C
F = A B C + AB C
L = 6 G = 8 GN = 11
F = (A + C)( B + C)( A + B)
L = 6 G = 9 GN = 12
F
 Same function and same
literal cost
A
 But first circuit has better B
gate input count and better C
gate input count with NOTs
 Select it!
=> Gate input cost performs better.
F
Chapter 2 - Part 2
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Boolean Function Optimization
 Minimizing the gate input (or literal) cost of a (a set of)
Boolean equation(s) reduces circuit cost.
 We choose gate input cost.
 Boolean Algebra and graphical techniques are tools to
minimize cost criteria values.
 Some important questions:
• When do we stop trying to reduce the cost?
• Do we know when we have a minimum cost?
=> Optimization problem
 Treat optimum or near-optimum cost functions
for two-level (SOP and POS) circuits first.
 Introduce a graphical technique using Karnaugh maps (Kmaps, for short)
Chapter 2 - Part 2
8
Karnaugh Maps (K-map)
 A K-map is a collection of squares
• Each square represents a minterm
• The collection of squares is a graphical representation
•
•
of a Boolean function
Adjacent squares differ in the value of one variable
Alternative algebraic expressions for the same function
are derived by recognizing patterns of squares
 The K-map can be viewed as
• A reorganized version of the truth table
Chapter 2 - Part 2
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Some Uses of K-Maps
 Provide a means for:
• Finding optimum or near optimum
 SOP and POS standard forms, and
 two-level AND/OR and OR/AND circuit
implementations
for functions with small numbers of
variables
• Visualizing concepts related to manipulating
Boolean expressions, and
• Demonstrating concepts used by computeraided design programs to simplify large
circuits
Chapter 2 - Part 2
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Two Variable Maps
 A 2-variable Karnaugh Map:
• Note that all the adjacent minterms are
differ in value of only one variable
Chapter 2 - Part 2
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From Truth Tables to K-Map
 K-Maps can be used to simplify Boolean functions by
systematic methods. Terms are selected to cover the
1’s cells in the map.
 Example – Two variable function:
Result of simplification :
F  AB
Chapter 2 - Part 2
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K-Map Function Representation
Example 2-4: G( A, B)  A B  AB
Result of simplification=?
Chapter 2 - Part 2
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K-Map Function Representation
 Example: G(x,y) = x + y
G = x+y y = 0 y = 1
x=0
0
1
x=1
1
1
 For G(x,y), two pairs of adjacent cells containing
1’s can be combined using the Minimization
Theorem:
G( x , y )  (x y  x y ) (xy  x y ) x  y
Duplicate xy
Chapter 2 - Part 2
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Three Variable Maps
 A three-variable K-map:
 Where each minterm corresponds to the product
terms:
yz=00 yz=01 yz=11
x=0 x y z
xyz
xyz
yz=10
xyz
x=1 x y z
xyz xyz xyz
 Note that if the binary value for an index differs in one
bit position, the minterms are adjacent on the K-Map
Chapter 2 - Part 2
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Three-Variable Maps
 Reduced literal product terms for SOP standard
forms correspond to rectangles on K-maps
containing cell counts that are powers of 2.
 Rectangles of 2 cells represent 2 adjacent
minterms; of 4 cells represent 4 minterms that
form a “pairwise adjacent” ring.
• 2 cells rectangle will cancel 1 variable
• 4 (=22 ) cells rectangle will cancel 2 variables
• 8 (=23 ) cells rectangle will cancel 3 variables
 What is the result for this case in three variables K-map?
Chapter 2 - Part 2
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Three Variable Maps

Example 2-5: Simplify
F (A, B ,C )  m(0, 1, 2, 3, 4, 5)
Result:
F ( A, B ,C )  A  B
Chapter 2 - Part 2
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Three Variable Maps

Example 2-6: Simplify
G( A, B ,C )  m(0, 2, 4, 5, 6)
Result:
G( A, B,C )  AB  C
Chapter 2 - Part 2
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Three Variable Maps

Example 2-7: Simplify
H ( A, B ,C )  m(1, 3, 4, 5, 6)
Result:
H ( A, B,C)  A C  AB  AC
Chapter 2 - Part 2
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Three-Variable Map Simplification
 Use a K-map to find an optimum SOP
equation for F(X, Y, Z)  m(0,1,2,4,6,7)
Chapter 2 - Part 2
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Four Variable Maps
 Map and location of minterms:
Chapter 2 - Part 2
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Four Variable Terms
 Four variable maps can have rectangles
corresponding to:
• A single 1 = 4 variables, (i.e. Minterm)
• Two 1s = 3 variables,
• Four 1s = 2 variables
• Eight 1s = 1 variable,
• Sixteen 1s = zero variables (i.e.
Constant "1")
Chapter 2 - Part 2
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Four-Variable Maps
 Example 2-8: Simplify
F (A, B ,C , D)  m(0, 1, 2, 4, 5, 6, 8, 9, 10,12,13)
Result:
F  C  AD  BD
Chapter 2 - Part 2
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Four-Variable Maps
 Example 2-9: Simplify
G( A, B,C , D)  A C D  A D  B C  CD  AB D
Result:
G  B D  A C  CD
Chapter 2 - Part 2
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Four-Variable Map
 F(W, X, Y, Z)  m(3,4,5,7,9,13,14,15)
Chapter 2 - Part 2
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2-5 Map Manipulation
 Implicant: the rectangles on a map made up of squares containing 1s
correspond to implicants.
 A Prime Implicant is a product term obtained by combining the maximum
possible number of adjacent squares in the map into a rectangle with the
number of squares a power of 2.
 A prime implicant is called an Essential Prime Implicant if it is the only
prime implicant that covers (includes) one or more minterms.
 Prime Implicants and Essential Prime Implicants can be determined by
inspection of a K-Map.
 A set of prime implicants "covers all minterms" if, for each minterm of the
function, at least one prime implicant in the set of prime implicants
includes the minterm.
Chapter 2 - Part 2
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Example of Prime Implicants
 Find ALL Prime Implicants
CD
C
BD
1
1
BD
1
ESSENTIAL Prime Implicants
C
BD
1
BD
1
A
AB
1
1
B
B
1
1
1
1
1
1
1
1
1
A
1
1
D
AD
1
1
1
1
D
BC
Minterms covered by single prime implicant
Chapter 2 - Part 2
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Another Example
 Find all prime implicants for:
G(A, B, C, D)  m(0,2,3,4,7,12,13,14,15)
• Hint: There are seven prime implicants!
Chapter 2 - Part 2
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Optimization Algorithm
 Find all prime implicants.
 Include all essential prime implicants in the
solution
 Select a minimum cost set of non-essential
prime implicants to cover all minterms not yet
covered.
 Minimize the overlap among prime implicants
as much as possible. In particular, in the final
solution, make sure that each prime implicant
selected includes at least one minterm not
included in any other prime implicant selected.
Chapter 2 - Part 2
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Selection Rule Example
 Simplify F(A, B, C, D) given on the KSelected Essential
map.
C
1
1
1
1
1
1
1
1
1
B
1
A
C
1
D
1
1
1
B
1
A
1
1
1
1
D
Minterms covered by essential prime implicants
Chapter 2 - Part 2
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Example 2-12
 Simplifying a function using the selection
rule
F(A,B, C, D)  m(0,1, 2, 4, 5,10,11,13,15)
Result:
F(A,B, C, D)  A C  ABD  ABC  A BD
Chapter 2 - Part 2
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Product-of-Sums Optimization
 The minterm not included in the function belong
to the complement of the function.
 Example 2-13: F(A,B, C, D)  m(0,1, 2, 5, 8, 9, 10)
F  AB  CD  BD
F  (A  B)(C  D)(B  D)
Don't Cares in K-Maps
 Sometimes a function table or map contains entries for
which it is known:
• the input values for the minterm will never occur, or
• The output value for the minterm is not used
 In these cases, the output value need not be defined
 Instead, the output value is defined as a “don't care”
 By placing “don't cares” ( an “x” entry) in the function table
or map, the cost of the logic circuit may be lowered.
 Example 1: A logic function having the binary codes for the
BCD digits as its inputs. Only the codes for 0 through 9 are
used. The six codes, 1010 through 1111 never occur, so the
output values for these codes are “x” to represent “don’t
cares.”
Chapter 2 - Part 2
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Don't Cares in K-Maps
 Example 2-14: Simplify
F ( A, B, C , D)   m (1, 3, 7, 11, 15)
d ( A, B, C , D)   m (0, 2, 5)
Chapter 2 - Part 2
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Example: BCD “5 or More”
 The map below gives a function F1(w,x,y,z) which
is defined as "5 or more" over BCD inputs. With
the don't cares used for the 6 non-BCD
combinations:
y
F1 (w,x,y,z) = w + x z + x y G = 7
00 01 03 02
w
 This is much lower in cost than F2 where
04 15 17 16
the “don't cares” were treated as "0s."
x
X12 X13 X15 X14 F2(w, x, y, z)  w x z  w x y  w x y G = 12
 For this particular function, cost G for the
1 8 1 9 X11 X10
POS solution for F1(w,x,y,z) is not changed
z
by using the don't cares.
Chapter 2 - Part 2
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2-7 Multiple-Level Circuit Optimization
 Multiple-level circuits - circuits that are
not two-level (with or without input
and/or output inverters)
 Multiple-level circuits can have reduced
gate input cost compared to two-level
(SOP and POS) circuits
 Multiple-level optimization is performed
by applying transformations to circuits
represented by equations while
evaluating cost
Chapter 2 - Part 2
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From two-level circuit to multiple-level circuit
G  ABC ABD E  ACF  ADF
Two-level circuit
Gate-input cost =17
Chapter 2 - Part 2
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From two-level circuit to multiple-level circuit
G  AB(C  D)  E  A(C  D) F
Multiple-level
circuit
Gate-input cost =13
Chapter 2 - Part 2
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From two-level circuit to multiple-level circuit
Share (C+D) in the preceding circuit:
Gate-input cost =11
But, G  ( AB  AF)(C  D)  E
Gate-input cost =12 <= increasing gate cost
Chapter 2 - Part 2
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From two-level circuit to multiple-level circuit
G  A( B  F )(C  D)  E
Gate-input cost = 9
Chapter 2 - Part 2
40
Transformations
 Factoring - finding a factored form from SOP
or POS expression
 Decomposition - expression of a function as a
set of new functions
 Substitution of G into F - expression function F
as a function of G and some or all of its original
variables
 Elimination - Inverse of substitution
 Extraction - decomposition applied to multiple
functions simultaneously
Chapter 2 - Part 2
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Example 2-16 Multilevel optimization
G  AC E  AC F  AD E  AD F  BCDE F
H  A BCD  ABE  ABF  BCE  BCF
Factoring:
G  A( C E  C F  D E  D F )  BCDEF
G  A( C  D )( E  F )  BCDEF
Decomposition:
G  A( C  D ) X 2  BX1 E F
X 1  CD
X2  E  F
Chapter 2 - Part 2
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Example 2-16 Multilevel optimization
(continue)
 Substitution:
G  AX 1 X 2  BX1 X 2
X 1  CD
X2  E  F
 Applying similar process to H, we have
H  B( A (CD)  ( A  C)(E  F ))
Chapter 2 - Part 2
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Example 2-16 Multilevel optimization
(continue)
Substitution and sharing:
G  AX 1 X 2  BX1 X 2
H  B( A X 1  X 3 X 2 )
X 1  CD
X2  E  F
X3  A C
Gate-input cost:
• Original: 48
• Decomposition without sharing: 31
• Decomposition with sharing: 25
Chapter 2 - Part 2
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Example 2-16 Multilevel optimization
(continue)
Fig. 2-21
Chapter 2 - Part 2
45
Delay problem (Example 2-17)
 Multiple-level circuit causes long delay
 For Fig. 2-21 (b), four logic gates in the
longest path (from C, D, E, F and A to H)
 Delay reduction form Fig. 2-21 (b)
What happened?
Chapter 2 - Part 2
46