cpe/ee 422/522 Advanced Logic Desing

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Transcript cpe/ee 422/522 Advanced Logic Desing

ECE 616
Advanced FPGA Designs
Electrical and Computer Engineering
University of Western Ontario
General
1. Welcome remark
2. Digital and analog
3. VLSI: ASIC and FPGA
4. Overview
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Course Requirement
1.
Rules
1. Attendance
2. Projects:
3. Final
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Information
1.
Text book in library:

M. J. S. Smith, Application-Specific Integrated Circuits,
Addison-Wesley, 1997. ISBN: 0201500221.

Digital Systems Design Using VHDL, Charles H. Roth, Jr.,
PWS Publishing, 1998 (ISBN: 0-534-95099-X).
2.
Class notes and lab manual:
www.engga.uwo.ca/people/wwang
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Wei Wang
Office:
EC 1006
Office hours: Thursday
3:00 to 5:00 pm
Email:
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[email protected]
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Digital and Analog
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Overview
• Digital system: 489 materials
• VHDL
• FPGA and CPLD
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Outline
Review of Logic Design Fundamentals
• Combinational Logic
• Boolean Algebra and Algebraic Simplifications
• Karnaugh Maps
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Combinational Logic
• Has no memory =>
present state depends only on the present input
X = x1 x2... xn
Z = z1 z2... zm
x1
x2
z1
z2
xn
zm
Z(t)  F( X(t))
Note:
Positive Logic – low voltage corresponds to a logic 0, high voltage to a logic 1
Negative Logic – low voltage corresponds to a logic 1, high voltage to a logic 0
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Basic Logic Gates
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Full Adder
Module
Truth table
Algebraic expressions
F(inputs for which the Minterms
function is 1):
Sum  X' Y' Cin  X' YCin'XY' Cin'XYCin
Cout  X' YCin  XY' Cin  XYCin'XYCin
m-notation
Sum  m1  m2  m4  m7  m(1, 2, 4, 7)
Cout  m3  m5  m6  m7   m(3, 5, 6, 7)
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Full Adder (cont’d)
Module
Truth table
Algebraic expressions
F(inputs for which the Maxterms
function is 0):
Sum  ( X  Y  Cin)( X  Y'Cin' )( X' Y  Cin' )( X' Y'Cin)
Cout  ( X  Y  Cin)( X  Y  Cin' )( X  Y'Cin)( X' Y  Cin)
M-notation
Sum  M1  M3  M5  M6   M(1, 3, 5, 6)
Cout  M0  M1  M2  M4   M(0, 1, 2, 4)
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Boolean Algebra
• Basic mathematics used for logic design
• Laws and theorems can be used to
simplify logic functions
– Why do we want to simplify logic functions?
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Laws and Theorems of Boolean Algebra
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Laws and Theorems of Boolean Algebra
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Simplifying Logic Expressions
• Combining terms
– Use XY+XY’=X, X+X=X
Cout  X' YCin  XY' Cin  XYCin' XYCin
 ( X' YCin  XYCin)  ( XY' Cin  XYCin)  ( XYCin' XYCin)
 YCin  XCin  XY
• Eliminating terms
– Use X+XY=X
• Eliminating literals
– Use X+X’Y=X+Y
• Adding redundant terms
– Add 0: XX’
– Multiply with 1: (X+X’)
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Theorems to Apply to Exclusive-OR
X 0  X
X  1  X'
XX 0
X  X'  1
XY  YX
(Commutative law)
( X  Y )  Z  X  ( Y  Z)
X( Y  Z)  XY  XZ
(Associative law)
(Distributive law)
( X  Y)'  X  Y'  X'Y  XY  X' Y'
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Karnaugh Maps
• Convenient way to simplify logic
functions of 3, 4, 5, (6) variables
• Four-variable K-map
Location
of minterms
– each square corresponds to one
of the 16 possible minterms
– 1 - minterm is present;
0 (or blank) – minterm is absent;
– X – don’t care
• the input can never occur, or
• the input occurs but the output is not
specified
– adjacent cells differ in only one value =>
can be combined
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Karnaugh Maps (cont’d)
• Example
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Sum-of-products Representation
• Function consists of a sum of prime implicants
• Prime implicant
– a group of one, two, four, eight 1s on a map
represents a prime implicant if it cannot be combined
with another group of 1s to eliminate a variable
• Prime implicant is essential if it contains a 1
that is not contained in any other prime implicant
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Selection of Prime Implicants
Two minimum
forms
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Procedure for min Sum of products
• 1. Choose a minterm (a 1) that has not been
covered yet
• 2. Find all 1s and Xs adjacent to that minterm
• 3. If a single term covers the minterm and all
adjacent 1s and Xs, then that term is an essential
prime implicant, so select that term
• 4. Repeat steps 1, 2, 3 until all essential prime
implicants have been chosen
• 5. Find a minimum set of prime implicants that
cover the remaining 1s on the map. If there is more
than one such set, choose a set with a minimum
number of literals
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Products of Sums
• F(1) = {0, 2, 3, 5, 6, 7, 8, 10, 11}
F(X) = {14, 15}
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To Do
• Textbook
– Chapter 1.1, 1.2
• Read
– Altera’s MAX+plus II and the UP1 Educational board:
A User’s Guide, B. E. Wells, S. M. Loo
– Altera University Program Design Laboratory Package
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