Transcript Prospect of Super Belle Do we know all about beauty yet?

Silicon Strip R&D Activity
in Korea
B.G. Cheon (Chonnam Nat’l Univ.)
On behalf of Korean Silicon Working Group
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Introduction
Sensor design and simulation
Pre-results of 1st mask performance
Status of 2nd mask design
Summary
Korean silicon working group
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Generic silicon sensor R&D since 2001
Silicon charge detector for CREAM balloon experiment
Started working on silicon sensor R&D for Belle upgrade
Looking for any application to other fields
7 institutions so far …
Kyungpook National University
Ewha Women’s University
Seoul National University
Korea University
Yonsei University
Sungkyunkwan University
Chonnam National University
Silicon tracker R&D for ILC
Global design layout/parameter concepts can be referred to other
presentations in this workshop.
• Intermediate tracker
- tracking efficiency
- linking efficiency
- matching efficiency
- standalone tracker
• main tracker
- momentum resolution
- tracking efficiency
DSSD sensor design
n+ ohmic components:
# : implanted n+
# : p-stop
# : SiO2
# : Al for readout
n+ ohmic
side
p+ junction components:
1st metal
2nd metal readout line
Metal 1 and metal 2 contact (VIA)
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Double-sided silicon strip sensor type
Three metal process
Implanted strips in ohmic side are orthogonal
to the strips in juction side
Readout strips in junction side are parallel to
the strips of ohmic side
p+ junction
side
# : implanted p+
# : 1st metal
# : SiO2
# : VIA
# : 2nd metal
DSSD sensor simulation
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Simulation package : Silvaco TCAD
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ATHENA – process simulation
ATLAS – device simulation
PIN diode simulation calibrates DSSD simulation
Structure & mesh
Implantation (Boron, Phosphorus)
Electric potential & field
IV & CV characteristics
Response of injected photon into the DSSD
Structure
Implantation
N strip = Phosphorus
P stop = Boron
P strip = Boron
Annealing 900oC, N2, 90min at P+
Annealing 900oC, N2, 140min at N+
IV & CV
Leakage current (I-V)
C-V
1/C2 -V
Photon injection into DSSD
photon : wavelength = 0.6mm, intensity=100W/cm2
Total current density
e- current density
h+ current density
Wafer layout (1st mask)
Mask design package : Cadence (Solaris)
DSSD sensor parameters
DC – Type
List
p+ side
unit
n+ side
Sensor size
55610 x 29460 (sawing line included)
μm2
Wafer thickness
380
μm
Strip pitch interval
100
50
μm
Readout pitch interval
50
50
μm
# of implanted strips
512
512
# of readout strips
512
512
Strip pitch length
25600
51072
μm
Strip pitch width
9
9
μm
Readout pitch width
9
9
μm
Test bench @ clean room
Sensor profiles
n+ implanted
p-stop in atoll
p+ implanted
readout strip
readout pad in staggering
VIA in hourglass
guard ring
n+ side
p+ side
P-side measurement
Probe n bulk pad(ground) on n-side & p-guard ring (-) on p-side
These are
disappeared
after insulating
wafer edges
1E-6
Pside IV ( LOT4_1_T1_shield)
-7
8.0x10
1E-7
-7
LOT4_1_T1
7.0x10
LOT4_4_T1
-7
1E-8
0
20
40
60
80
Leakage current(A)
Leakage current (A)
Total leakage current/sensor
6.0x10
LOT4_4_T3
-7
5.0x10
-7
4.0x10 120
100
-7
3.0x10
Reverse bias voltage(V)
-7
2.0x10
-7
1.0x10
0
20
40
60
80
100
120
Reverse bias voltage(V)
140
160
Total capacitance/sensor
LOT4_1_TI_CV
A
1.20E-010
1.00E-010
4.00E+020
Y Axis Title
Capacitance(F)
6.00E+020
2.00E+020
8.00E-011
0.00E+000
6.00E-011
0
20
40
60
80
100
X Axis Title
4.00E-011
2.00E-011
0
20
40
60
80
100
120
Reverse bias voltage(V)
140
160
180
Specification of 2nd mask design
Multi-purpose mask: sensors + various test patterns
N-side
P-side
512ch 50mm pitch
512ch 100mm pitch
2types
Miniature
16ch 50mm pitch
32ch 50mm pitch
64ch 50mm pitch
16ch 100mm pitch
32ch 100mm pitch
64ch 100mm pitch
Pixel Array
n+ implantation
25mm 5☓5 array
50mm 5☓5 array
100mm 5☓5 array
PIN Diode
n+ implantation
1cm☓1cm diode
SSD R&D
(Single Strip Detector)
n+ implantation
100mm pitch
2 types
SDD R&D
(Silicon Drift Detector)
25mm sensor
25mm sensor surrounded by p+ imp.
p+ implantation
Sensors
Test Patterns
N-side
64ch 50mm pitch
32ch 50mm pitch
16ch 50mm pitch
Rear-side of SSD
512ch 50mm pitch
1x1cm2 PIN diode
For SDD R&D
Pixel Array
P-side
64ch 100mm pitch
512ch 100mm pitch
w/o hourglass (sensor-1)
1cm PIN diode
32ch 100mm pitch
For SDD R&D
16ch 100mm pitch
Pixel array
16ch 100mm pitch SSD
512ch 100mm pitch
w/ hourglass (sensor-2)
P-side (sensor-1)
Implant w/ hourglass
 perpendicular to metal
 designed to reduce capacitance
 not applied to VIA region
512ch 100mm pitch sensor
Test pattern: Miniature
S/N measurement of each pitch strip sensor
after making wire bonding complete.
 Three types of sensors have been prepared.
- 16/32/64 channels
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P-side :16ch 100mm pitch Sensor
Case of wire bonding
N-side :16ch 50mm pitch sensor
Test pattern: P-side SSD
SiO2
contact
1st Metal
p+
2nd Metal
VIA
SiO2
 P-side: two metal processes
 It is needed to make it compatible
with other p+ implantation.
16ch 100mm pitch sensor(55610 x 5560)
Metal
p+ implantation
Metal size is smaller than p+ implant
by keeping contact size.
Metal size is larger than p+ implant
by reducing contact size.
Metal
p+ implantation
Test pattern: pixel array
 Pixel size : 25☓25, 50☓50, 100☓100 (mm2)
 Each sensor array : 5☓5 matrix
 Readout pad option was added to make wire bonding easy
during the measurement of S/N
Case of wire bonding in each diode
Case of readout pad in each diode
Test pattern: SDD
 R&D pattern for Silicon Drift Detector
 Sensor size : 1cm ☓ 1cm (guard ring included)
 N-side : n+(sensor) & p+ implant except the sensor
 P-side : p+ implant in total
50mm☓50mm
n+ implant
100mm☓100mm metal
Summary
 DSSD sensors fab-out (~20 wafers, 3 sensors/wafer) and IV & CV
have been measured.
 automatic probe station & wirebonder purchased and installed
 faster and more reliable measurement
 2nd mask design including various test patterns is almost ready.
 Fabrication and measurement will be done within two months.
 Silicon Drift Detector R&D has just been started.
 Irradiation test for checking sensor rad-hardness is being planned.
 Readout & DAQ design and production are in progress.
Backup sildes
CREAM Silicon Charge Detector
CREAM(Cosmic Ray Energetics And Mass) balloon exp.
To measure energy spectrum of each elements in 1012 ~1015 eV
First mission of design, fab. and integration performed in Korea
Sensor size=1.1cm2 ; S/N>4 ; Total 1000 channels
Electric potential
Reverse bias ( 0V ~ -90V )
Electric field
N wafer region
P_strip region
(P+)
P_strip’s doping concentration is higher than N
wafer’s. So N_bulk region’s electric field is
spread out widely, but the slope of P_strip
region’s field is very steep. In depletion region,
electric field is not zero.
Electron concentration
The higher reverse bias is, the larger depletion region is
Recombination rate
The higher reverse bias is, the larger depletion region is
N-side sensor
p-stop
guard ring
pad
512ch 50mm pitch sensor
P-side (sensor-2)
Implant w/o hourglass
 hard to implement hourglass
in the mask process
 compare btw w/ and w/o hourglass
512ch 100mm pitch sensor
SENS technology
Test pattern: SDD type-1
 Silicon Drift Detector R&D를 위한 pattern
 guard ring을 포함한 크기 : 1cm ☓ 1cm
 N-side에 센서를 두고 뒷면은 무공정
 센서의 배열에 따라 세 종류가 있다.
50mm☓50mm
n+ implant
100mm☓100mm metal
Implantation
Annealing 900oC, N2, 90min at P+
Annealing 900oC, N2, 140min at N+