Transcript Slide 1

Intermediate Tracker
1.Introduction
2.Intermediate trackers/FTD for LC
3.Simulation study
4.Outside Si-tracker option
5.Silicon strip R&D for the intermediate
tracker
6.Summary
H. J. Kim, KNU
2004/11/09 7th ACFA workshop
7th ACFA, H.J.Kim
▣
Why VTX and tracking important?
• recoil mass reconstruction
- importance of tracking resolution
q qbar ( b bbar -> Vertex! )
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General view of Three detector option
GLD(Huge)
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Purpose of Intermediate Tracker
*To improve
1) the linking efficiency of a main track to the
corresponding VTX hits,
2) the reconstruction efficiency of low-momentum
tracks and of particles which decay between the VTX
and the Main tracking system
3) the momentum resolution of tracks.
* If the beam background is very severe, you can tu
rn off the HV of inner layers of TPC without serious
performance loss
*Trigger and/or Time stamping capability
*Standalone tracking
7th ACFA, H.J.Kim
7th ACFA, H.J.Kim
Silicon Tracking for SiD (Jaros’s talk)
Why silicon microstrips?
Robust against beam halo
showers
SiD starting point
Thin, even for forward tracks.
Won’t degrade ECAL
Stable alignment and calibration.
No wandering T to D.
Excellent momentum resolution (p/p2~2 x 10-5)
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TESLA tracking system
Magnetic field: 4 Tesla
cos(q)=.995
from TESLA TDR
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From Behnke’s talk
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From Behnke’s talk
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Typical “Large/Huge” models under consideration
“GLC” design (ACFA)
m
“Large/Huge”
m
SC-coil
SC-coil
Pb/scinti HCAL
HCAL
(Pb(Fe)/scinti or digital)
Pb/Scinti ECAL
W/Scinti ECAL
TPC
Jet chamber
(Jet chamber as option)
Si intermedi.-Trk
Si intermedi.-Trk
SiVTX pixel
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SiVTX pixel(cold version)
▣ Intermediate Tracker Configuration
• stand-alone tracking capability
• 5 layers at r = 9 to 37 cm
• angular coverage |cosΘ|<0.9
• spatial resolution σ = 10 μm
• thickness of a layer: 0.6% Xo
Huge detector concept:
TPC: Rmin = 40 cm
Do not expect much changes in IT
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Intermediate Tracker Design
for GLC
- Double-sided silicon microstrip detectors
i. excellent spatial resolution
ii. well-established technology
Layout of the IT surrounding the VTX.
- The distance between the last layer of VTX and the first layer
of Trackeris about 39cm in Large detector design.
i. 5 layers of coaxial cylinders at 9, 16, 23, 30 and 37cm
ii. covers | cosq |<0.90 coinciding with the region covered by VTX
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Momentum Resolution
(  Pt / Pt vs. Pt )
 r = 10, 20, 30, 40 w/ std. design parameters
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Linking Efficiency
Linking efficiency is able to be measured by “Residual” whic
defined as a precision from the difference of distance betwee
the position of extrapolate track of main tracking & the hit positio
on IT or VTX layers
CDC
IT5
drphi  r  (ext  hit )
dz  zext  zhit
Figure. The definition of Residuals.
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Residuals for a single pion
For a single pion, a linking efficiency with IT+VTX is
improved
by ~20 % compared to that with VTX only.
Residuals vs. generation energy for a single pion
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Why Si Tracker ? (Sugimoto’s talk)
• 5x10-5 does not satisfy the design criteria if the
beam energy spread is 0.1%
• The performance goal should be 2x10-5
• How?
 Outside Si Tracker for a Huge Detector ???
7th ACFA, H.J.Kim
The Detector Model
• Si Vertex Detector
– 5 layers, t=70mm, =3mm
– cosq < 1 (non-realistic)
• Si Inner Tracker
– 3 layers (12, 24, 36 cm), t=300mm, =7mm
– cosq <1 (non-realistic)
• TPC
– 40cm < R < 200cm, Z<235cm
– Ar gas, 220 samples, =150mm
• Si Outer Tracker
– R=205cm(barrel)/Z=250cm(EC), =7mm
• Momentum resolution is calculated following Gluckstern’s method
– No sophisticated method such as Kalman filter is used
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Performance
Pt/Pt2
Pt (GeV/c)
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Performance
P/P2 (M.S. not included)
FTD?
cosq
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▣ Silicon sensor R&D <- Details by B.G.Cheon
• double sided silicon strip
• tree metal process
- implant strips in ohmic
side are orthogonal to
those in junction side
-readout strips in junction
side have the same
direction as that of ohmic
side
n+
ohmic
side
1st metal
2nd metal readout line
p+
junction
side
Metal 1 and metal 2 contact (VIA)
Front Side:
- brown: implanted n+
- blue: p-stop
- sky blue: SiO2
- gray: Al for readout
Back Side:
- blue: implanted p+
- first gray: 1st metal
- sky blue: SiO2
- vertical gray: VIA
- second gray: 2nd metal
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▣ MASK Design : P Side
64ch 100um pitch sensor
512ch 100um pitch sensor
Without hour glass
1cm PIN Diode
16ch 100um pitch sensor
32ch 100um pitch sensor
For SDD R&D
PIN Diode array
512ch 100um pitch sensor
With hour glass
16ch 100um pitch SSD
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▣ Silicon Sensor
n+ implanted
p-stop in atoll
p+ implanted readout strip
readout pad in staggering
via in hourglass
guard ring
N side
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P side
▣ Measurements
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Leakage current (A)
▣ Measurements of the sensor
1E-6
These are
disappeared
after insulating
wafer edges
1E-7
LOT4_1_T1
LOT4_4_T1
LOT4_4_T3
1E-8
0
20
40
60
80
100
Reverse bias voltage(V)
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120
▣ Sensor Readout
RC chip
DSSD
VA-TA
Control Signal
FPGA
USB2
DAQ
FADC
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USB2 with 25Mhz 12bit FADC for Readout R&D
FX2
CPLD
FADC
input
trigger
31 FPGA I/O
for R&D
SRAM
Flash RAM
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Radiation hardness beamtest with proton
•Radiation damage problem
-> Signal reduction
-> Noise increase
-> Depletion voltage increase
-> Sensor damage
• Radiation damage Measurement
-> 30-50MeV Cyclotron proton, neutron beam irradiation
(Korean cancer center hospital, Seoul, Korea)
-> Leakage current measurement
-> Capacitance measurement
-> Signal measurement
• Processing improvement
-> Radiation damage characteristics study
-> Radiation hardness improvement
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Intermediate Tracker R&D Activities in Korea
√ linking and reconstruction efficiency (Fast Simulation)
√ track momentum resolution (Full Simulation)
√ DSSD simulation/design/fabrication
Electronics(RC chip, VA1TA, FADC), DAQ
√ S/N ratio measurement and beam test
DAQ/Electronics/Test
KNU/KU/CNU
Sensor design
Process chart
Sensor
KNU / SNU
Simulation
(process and device)
KNU/SKKU
- Kyungpook National University
- Korea University
- Seoul National University
- Chunnam National University
- Sungkyunkwan University
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Summary
• Intermediate Tracker is necessary to improve
momentum resolution and track linking efficiency
• TPC+Si Tracker System in GLD including SOT will sa
tisfy the original design criteria even for Eb=0.1% in
wide angular range (|cosq|<0.9).
• Double (single) side silicon strip sensor R&D is
ongoing in Korea
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Study issue
• Intermediate tracker geometry optimization
• FTD geometry optimization
• Double side vs Single side strip senor
• Intermediate tracker trigger?
• Time stamping (Separation of bunches)
• Radiation hardness
• Mechanical structure
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Backup slide
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▣ Cleaning Room
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▣ MASK Design : N Side
64ch 50um pitch sensor
512ch 50um pitch sensor
32ch 50um pitch sensor
1cm PIN Diode
16ch 50um pitch sensor
For SDD R&D
PIN Diode array
Backside of SSD
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Radiation damage by n, p and e
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▣ Intermediate Tracker Option
• Require good σrΦ and σz
• Reasonable (moderate) cost
Type
σrΦ
σz
MSGC
+GEM
30μ
30μm
SSD
10 μm
20 μm
Straw Chamber
50 μm
1mm
Fiber Tracker
50 μm
1mm
Inner DC
80 μm
1mm
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Fast Signal
Fast Signal
Pt/Pt2 : Measurement Term
SiD
GLD
GLD
TESLA
TESLA
(Si=7mm)
(Si=10mm)
(Si=10mm)
(Si=7mm)
TPC
1.2x10-4
1.2x10-4
1.5x10-4
1.5x10-4
VTX+TPC
4.6x10-5
4.6x10-5
5.2x10-5
5.2x10-5
VTX+SIT+TPC
2.9x10-5
3.4x10-5
4.1x10-5
3.5x10-5
VTX+SIT+TPC+SO
T
1.9x10-5
2.3x10-5
2.6x10-5
2.2x10-5
2.4x10-5
3.2x10-5
3.7x10-5
2.8x10-5
VTX+SIT+SOT
2.1x10-5
VTX=3mm in all cases
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