Chapter 3-Webster Amplifiers and Signal Processing

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Transcript Chapter 3-Webster Amplifiers and Signal Processing

Chapter 3-Webster
Amplifiers and Signal Processing
Applications of Operational Amplifier
In Biological Signals and Systems
The three major operations done on biological signals using Op-Amp:
1) Amplifications and Attenuations
2) DC offsetting: add or subtract a DC
3) Filtering: Shape signal’s frequency content
Ideal Op-Amp
Most bioelectric signals are small and require amplifications
Figure 3.1 Op-amp equivalent circuit.
The two inputs are 1 and  2. A differential voltage between them
causes current flow through the differential resistance Rd. The
differential voltage is multiplied by A, the gain of the op amp, to
generate the output-voltage source. Any current flowing to the output
terminal vo must pass through the output resistance Ro.
Inside the Op-Amp (IC-chip)
20 transistors
11 resistors
1 capacitor
Ideal Characteristics
1- A =  (gain is infinity)
2- Vo = 0, when v1 = v2 (no offset voltage)
3- Rd =  (input impedance is infinity)
4- Ro = 0 (output impedance is zero)
5- Bandwidth =  (no frequency response limitations) and no phase shift
Two Basic Rules
Rule 1
When the op-amp output is in its linear range, the two input terminals
are at the same voltage.
Rule 2
No current flows into or out of either input terminal of the op amp.
Inverting Amplifier
o
10 V
i
Rf
-10 V
10 V
i
i
Ri
i
-
o
Slope = -Rf / Ri
+
-10 V
(a)
(b)
vo  -
Rf
Ri
vi
Rf
vo
G vi
Ri
Figure 3.3 (a) An inverting amplified. Current flowing through the
input resistor Ri also flows through the feedback resistor Rf . (b) The
input-output plot shows a slope of -Rf / Ri in the central portion, but the
output saturates at about ±13 V.
Summing Amplifier
Rf
R1
1
-
o
R2
2
+
 v1 v2 
vo  - R f   
 R1 R2 
Example 3.1
The output of a biopotential preamplifier that measures the electrooculogram is an undesired dc voltage of ±5 V due to electrode halfcell potentials, with a desired signal of ±1 V superimposed. Design a
circuit that will balance the dc voltage to zero and provide a gain of 10 for the desired signal without saturating the op amp.
+10
Rf
100 kW
Ri
10 kW
i
+15V
Rb
20 kW
5 kW
o
+
Voltage, V
i
i + b /2
0
Time
vb
-15 V
-10
(a)
(b)
o
Follower ( buffer)
Used as a buffer, to prevent a high source resistance from being
loaded down by a low-resistance load. In another word it prevents
drawing current from the source.
-
i
vo  vi
o
+
G 1
Noninverting Amplifier
o
i
Ri
i
Rf
10 V
Slope = (Rf + Ri )/ Ri
-10 V
10 V
i
-
i
o
+
vo 
R f  Ri
Ri
vi
-10 V
G
R f  Ri
Ri
 Rf
 1 
Ri




Differential Amplifiers
Differential Gain Gd
vo
R4
Gd 

v4 - v3 R3
v3
v4
Common Mode Gain Gc
For ideal op amp if the inputs are equal then the
output = 0, and the Gc =0. No differential
amplifier perfectly rejects the common-mode
voltage.
R4
R3
R3
vo
R4
R4
vo 
(v4 - v3 )
R3
Common-mode rejection ratio CMMR
Gd
CMRR 
Typical values range from 100 to 10,000
Gc
Disadvantage of one-op-amp differential amplifier is its low input resistance
Instrumentation Amplifiers
Differential Mode Gain
v3 - v4  i( R2  R1  R2 )
v1 - v2  iR1
v3 - v4 2 R2  R1
Gd 

v1 - v2
R1
 2 R2  R1  R4
 v2 - v1 
vo  
 R1  R3
Advantages: High input impedance, High CMRR, Variable gain
Comparator – No Hysteresis
+15
v1 > v2, vo = -13 V
v1 < v2, vo = +13 V
v2
-15
o
i
ref
R1
10 V
-
o
R1
-10 V
ref
+
R2
-10 V
If (vi+vref) > 0 then vo = -13 V
else
R1 will prevent overdriving the op-amp
vo = +13 V
i
Comparator – With Hysteresis
Reduces multiple transitions due to mV noise levels by moving the
threshold value after each transition.
o
i
ref
R1
With hysteresis
10 V
-
o
R1
-10 V
10 V
- ref
+
R2
R3
Width of the Hysteresis = 4VR3
-10 V
i
o
Rectifier
10 V
R
xR (1-x)R
D1
-10 V
D2
10 V
i
-10 V
i
+
(b)
R
D4
-
D3
o=
i
x
xR
-
+
(a)
i
(a)
Full-wave precision rectifier:
a) For i > 0,
D2 and D3 conduct, whereas D1 and D4 are
reverse-biased.
Noninverting amplifier at the top is active
(1-x)R
+
vo
D2
Rectifier
R
xR (1-x)R
D1
D2
xRi
-
i
+
i
-
vo
D4
R
D4
-
R
D3
o=
+
i
x
(b)
o
10 V
+
(a)
-10 V
10 V
i
-10 V
Full-wave precision rectifier:
(b)
b) For i < 0,
D1 and D4 conduct, whereas D2 and D3 are reverse-biased.
Inverting amplifier at the bottom is active
One-Op-Amp Full Wave Rectifier
i
Ri = 2 kW
Rf = 1 kW
v
-
o
D
RL = 3 kW
+
(c)
For i < 0, the circuit behaves like the inverting amplifier rectifier with
a gain of +0.5. For i > 0, the op amp disconnects and the passive
resistor chain yields a gain of +0.5.
Logarithmic Amplifiers
Uses of Log Amplifier
1. Multiply and divide variables
2. Raise variable to a power
3. Compress large dynamic range into small ones
4. Linearize the output of devices
Rf /9
Ic
VBE
i
Ri
VBE
Rf
-
o
+
 IC
 0.06 log
 IS



 vi


vo  0.06log
-13 
 Ri 10 
(a)
Figure 3.8 (a) A logarithmic amplifier makes use of the fact that a
transistor's VBE is related to the logarithm of its collector current.
For range of Ic equal 10-7 to 10-2 and the range of vo is -.36 to -0.66 V.
Logarithmic Amplifiers
VBE
Ic
Rf /9
vo
10 V
VBE
i
Ri
9VBE
Rf
-10 V
10 V
-
1
i
o
+
(a)
(b)
-10 V
10
Figure 3.8 (a) With the switch thrown in the alternate position, the
circuit gain is increased by 10. (b) Input-output characteristics show
that the logarithmic relation is obtained for only one polarity; 1 and
10 gains are indicated.
Integrators
1
vo  Ri C f
t1
 v dt  v
i
ic
0
Zf
Vo ( j )
Vi ( j )
Zi
- Rf
Vo  j 

Vi  j  Ri  jR f Ri C
Vo  j 
-1

Vi  j  Ri  jR C
i
Rf
vo - R f

vi
Ri
1
fc 
2R f C f
A large resistor Rf is used to prevent saturation
for f < fc
Integrators
Figure 3.9 A three-mode integrator With S1 open and S2 closed, the
dc circuit behaves as an inverting amplifier. Thus o = ic and o can
be set to any desired initial conduction. With S1 closed and S2 open,
the circuit integrates. With both switches open, the circuit holds o
constant, making possible a leisurely readout.
Example 3.2
The output of the piezoelectric sensor may be fed directly into the
negative input of the integrator as shown below. Analyze the circuit
of this charge amplifier and discuss its advantages.
isC = isR = 0
R
i
vo = -vc
s
C
-
dqs/ dt = is = K dx/dt
o
isC
isR
+
FET
Piezo-electric
sensor
1 t1 Kdx
Kx
vo  - 
dt  C 0 dt
C
Long cables may be used without changing sensor sensitivity or time
constant.
Differentiators
dvi
vo  - RC
dt
Zf
Vo ( j )
 - jRC
Vi ( j )
Zi
Figure 3.11 A differentiator The dashed lines indicate that a small
capacitor must usually be added across the feedback resistor to
prevent oscillation.
Active Filters- Low-Pass Filter
Vo  j  - R f
1


Gain = G =
Vi  j 
Ri 1  jR f C f
Ri
i
Cf
-
Rf
o
+
(a)
|G|
Rf/Ri
0.707 Rf/Ri
fc = 1/2RiCf
Active filters
(a) A low-pass filter attenuates high frequencies
freq
Active Filters (High-Pass Filter)
Vo  j  - R f jRi Ci

Gain = G =
Vi  j 
Ri 1  jRi Ci
|G|
i
Ci Ri
-
Rf
o
+
(b)
Rf/Ri
0.707 Rf/Ri
fc = 1/2RiCf
freq
Active filters
(b) A high-pass filter attenuates low frequencies and blocks dc.
Active Filters (Band-Pass Filter)
Cf
- jR f Ci
Vo  j 

Vi  j  1  jR f C f 1  jRiCi 
|G|
i
Ci R
i
-
Rf
o
+
(c)
Rf/Ri
0.707 Rf/Ri
fcL = 1/2RiCi
fcH = 1/2RfCf
Active filters
(c) A bandpass filter attenuates both low and high frequencies.
freq
Frequency Response of op-amp and Amplifier
Open-Loop Gain
Compensation
Closed-Loop Gain
Loop Gain
Gain Bandwidth Product
Slew Rate
Offset Voltage and Bias Current
Read section 3.12
Nulling, Drift, Noise
Read section and 3.13
Differential bias current, Drift, Noise
Input and Output Resistance
-
Rd
ii
d
+
i
+
o
Ro
-
Ad
vi
Rai 
 ( A  1) Rd
ii
Typical value of Rd = 2 to 20 MW
io
RL
CL
vo
Ro
Rao 

io A  1
Typical value of Ro = 40 W
Phase Modulator for Linear variable
differential transformer LVDT
+
+
-
Phase Modulator for Linear variable
differential transformer LVDT
+
+
-
Phase-Sensitive Demodulator
Used in many medical
instruments for signal detection,
averaging, and Noise rejection
The Ring Demodulator
If vc is positive then D1 and D2 are forward-biased and vA = vB. So vo = vDB
If vc is negative then D3 and D4 are forward-biased and vA = vc. So vo = vDC
vc  2vi