Transcript Integrated Circuits Design for Applications in Communications

Chapter 2
Small-Signal Amplifiers
• Most amplifiers in communication circuits are small signal amplifiers.
Hence, they can be described by linear equations. We will consider
several amplifiers including BJT, FET, operational amplifiers and
differential amplifiers.
Bipolar Transistor Amplifiers
• The equivalent circuit of the BJT is shown below
1
• rb’ is the resistance between the terminal and the actual base junction,
r is the base-emitter junction resistance.
• Typically r >> rb’. An estimation of r is
r 
kT 
q IC
• r0 is the collector to emitter resistance typically of the order 15k, r is
the collector-base resistance of the order several M.
• The transconductance gm r = 
gm 
qI C
 40 I C
kT
• A simplified version of the small-signal model equivalent circuit is
given below
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Common-Emitter Amplifier
• here the coupling capacitance is treated as a
short circuit.
• The output voltage is therefore
V0 
 g m RL r0V  g m RL r0 RVi

r0  RL
r0  RL R  Rs
Av 
V0  g m RL r0 R

Vi
r0  RL R  Rs
• The input impedance, not including Rs, is
given be
RR r
Z i
1
2 
R1R2  R1R  R2 R
• Since r depends on applied the input
resistance will depend on it as well.
• The current gain is
V
R
Vi
R  RS
Ai 
V0 / RL
R  Ri
IL

 S
Av
I i Vi /( Ri  RS )
RL
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Common Base Amplifier
• The Circuit diagram and its equivalent circuit model for the CB amplifier
are shown below
• Since the sum of the currents leaving the emitter junction is 0, we have
the following expression
V  Vi V V  V0
 
 g mV  0
Rs
r
r0
V  V0
V
 g mV  0
r0
RL
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• If r0 is assumed to be large compared with Rs, r and RL, the voltage
gain is
V
g Rr
Av 

0
Vi

m
L 
Rs  r  g m Rs r
RL
r  Rs (1   )
• if r >> Rs(1+), the magnitude of the voltage gain will be the same as
that of the common-emitter amplifier
• The input impedance of the common-base amplifier is determined
using the following circuit
Zi 
r
r
1
  
1  g m r 1   g m
Ai 
g m r


1  g m r 1  
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• The output impedance is determined using the following circuit
Z0  r0  R(1  gmr )
• The common-base amplifier has a voltage gain but its current gain is
less than unity. It is used as non-inverting amplifiers where low input
impedance and high output impedance is desired.
• It also has much better high-frequency response than CE amplifier and
is often used in high-frequency circuits.
6
Emitter Follower
• The EF has a non-inverting voltage gain of less than 1
• However, it can combine with other stages, such as the CE stage, to
realize a greater combined gain than CE stage alone
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• Using the equivalent circuit the voltage gain if found to be
(1   )[r0 RL /(r0  RL )]
Av 
Rs  r  (1   )[r0 RL /(r0  RL )]
(1   )r0 RL
Z i  r 
r0  RL
• EF configuration has the largest input impedance compared to the
other configurations
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• The output impedance is
r0 (r  Rs )
Z0 
r  Rs  r0 (1   )
V /R
V R  Zi
I
Ai  L  0 L  0 s
Ii
Ii
Vi RL
(1  g m r )r0

 1 
r0  RL
• EF is used when low output impedance is needed. Also, although it
has a voltage gain < 1, it has large current gain. It is frequently used as
a power amplifier for low-impedance loads.
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Field-Effect Transistors Amplifiers
• There are two types of FETs -- JFETs and MOSFETs.
• The low-frequency small signal model is as shown
• The transconductance is defined as
 I
g m  g m 0  D
 I DSS
gm 
dId
dVgs
1/ 2



• For JFETs
• where gm0 is the transconductance when gate-to-source bias voltage is
0, ID is the drain current and IDSS is the drain current when the gate-tosource voltage is 0.
1/ 2
 ID 
• For MOSFETs, gm is g m  g mR  I 
 DR 
• where gmR is the transconductance at some specified drain bias current
IDR
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Common-Source Amplifier
• The common-source amplifier is similar to the common-emitter
amplifier
• The common-source amplifier is similar to the common-emitter
amplifier.
• Normally Rg >> R so Vi = Vg
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• The source voltage is determined from the following equations
V0  Vs V0

 g mVgs  0
rd
RL
and
Vs Vs  V0

 g mVgs
Rs
rd
• since the current leaving output node and source is zero
• The current through Rs The source voltage is Vs   V0 Rs
V0
 g m RL rd

The voltage gain is Vi RL  rd  Rs (1  g m rd )
RL
•
• If rd >> Rs and RL we have the following relationship
Av 
• For gm Rs >> 1 we have
 g m RL
1  g m Rs
V0  RL

Vi
Rs
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Source-Follower
• The circuit diagram and its equivalent circuit model for source
follower are shown below
• If Rb >> Rs, then Vg  Vi
Vgs  Vi  V0
V0  g mVgs
Av 
rd RL
rd  RL
V0
g m [rd RL /(rd  RL )]

Vi 1  g m [rd RL /(rd  RL )]
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• The output impedance is Z 0 
rd
1  g m rd
• which is much smaller than the other two FET amplifier configurations
and is the major advantage for this configuration
Common-Gate Amplifier
• The common-gate amplifier is often used in high-frequency
application and has a much larger bandwidth than the common source
configuration.
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Vgs  Vs and fromc
V0 V0  Vs

 g mVs  0
RL
rd
• Thus
V0 RL (1  g m rd )

Vs
rd  RL
V0
 g m RL
Vs
• The input impedance at the source can be found by solving for the
source current
Is  g m Vs 
Zi 
• and
Vs  V0
rd
Vs rd  RL

I s 1  g m rd
 g m 
1
• since
•
Vs 
Vi Z i
Zi  R
Av 
V0
RL

Vi R  (rd  RL ) /(1  g m rd )
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V V
• The output impedance is determined as I 0  0 s  g mVs
rd
• but I0 is also the current passing through the source resistance so
Vs
and
R
V
Z 0  0  rd  (1  g m rd ) R
I0
I0 
• The common gate amplifier has the highest output impedance of the
three FET amplifier
Multistage Amplifiers
• Multistage amplifiers are used for impedance matching or to obtain
extra gain.
• Power transistors have smaller gain-bandwidth product than lowpower transistors, hence the power amplification stage is often
operated near unity voltage gain in order to maximize the bandwidth
• Voltage amplification is carried out in the stages preceding the power
amplification stage
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Dual Gate FET
• The FET cascode circuit has many high-frequency applications that two
FETs are often fabricated as a single transistor with 2 gates. The source
of the one transistor is continuous with the drain of the other so the device
has 1 source, 1 drain and 2 gates
• The device offers low-noise and high gain in radio-frequency applications
• It is a versatile device which can be used as a mixer or automatic gain
control amplifier. The equivalent circuit is as shown
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• Here gate 2 and the source are grounded
VD1   gm1Vgs1RL1
• The load resistance of the first stage is the input resistance of the
second stage, and the second stage is a common-gate amplifier.
Therefore V   g V 1
D1
•
 I
Since
g m  g mR  D
 I DR
m1 i
gm2
1/ 2



• where gmR is the transconductance at some specified drain bias current
IDR.
• Since both transistors have the same drain current gm1=gm2. Thus Vi=VD1 and Vgs2=-Vs2=-VD1
V0   gmVgs 2 RL   gm RLVi
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Push Pull Amplifiers
• Transistors all exhibit a nonlinear characteristic that causes distortion of
the input signal levels. Such distortion can be eliminated by push-pull
amplifier
• The above example uses 2 center-tapped transformers. The input
transformer separates the input signal into 2 signal 180 out of phase.
The output transformer is used to sum the output currents of the two
transistors.
• Hence V1  V2 and
I 0  K1 ( I1  I 2 )
• If the input signal is Vi  A cost
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• then the output of the 2 transistors are also periodic, and they can be
expressed in a Fourier series
I1  B0  B1 cost  B2 cos2t  B3 cost  ...
• If the two transistors are identical then I1 and I2 are identical except I2
lags I1 by 180 . Thus
I 2  B0  B1 cost  B2 cos2t  B3 cost  ...
• The output current is
I 0  2K1 ( B1 cost  B3 cost  ...)
• The even harmonics are eliminated from the output. This is important
as FET have a square-law characteristic that generates a relatively
large second harmonic.
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Differential Amplifier
• The differential amplifier is an essential building block in modern IC
amplifiers. The circuit is shown below:
• The operation of this circuit is based on the ability to fabricate matched
components on the same chip. In the figure IEE is realized using a current
mirror. We assume that Q1 and Q2 are identical transistors and both
collector resistors fabricated with equal values.
• The KVL expression for the loop containing the two emitter-base
junctions is  V1  VBE1  VBE 2  V2  0
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• The transistors are biased in the forward-active mode, the reverse saturation
current of the collector-base junction is negligible. The collector currents IC1
and IC2 are given by
I C1   F I ES exp(VBE1 / kT )
I C 2   F I ES exp(VBE 2 / kT )
• where we assumed that exp(VBE / kT )  1
I C1
 exp([VBE1  VBE 2 ] / kT )  exp(Vd / kT )
IC 2
• where Vd is the difference between the two input voltages. KCL at the
emitter node requires
 ( I E1  I E 2 )  I EE 
 F I EE
I C1

I C1
F

IC 2
F
dividing by I C1 /  F yields
IC 2
 F I EE
 1; T hus I C1 
I C1
1  exp(Vd / kT )
 F I EE
I

Similarly C 2 1  exp(V / kT ) The transfer
d
•
• characteristic for the emitter-coupled pair is shown on the following page.
• If Vd = 0 then IC1 = IC2
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• If we incrementally increase V1 by v / 2 and simultaneously decrease
V2 by v / 2 . The differential voltage becomes v . For v < 4kT as
indicated in the transfer characteristics above the circuit behaves linearly.
IC1 increases by I C and IC2 decreases by the same amount.
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Common Mode
• Consider both V1 and V2 are increased by v / 2 . The difference voltage
remains 0, and IC1 and Ic2 remain equal. However, both IC1 and Ic2 exhibit a
small increase I C . Hence the current in RE increases by 2I C . The
voltage VE is no longer constant but increase by an amount of 2IC RE .
This situation where equal signal are applied to Q1 and Q2 is the called the
common mode.
• Usually differential amplifiers are designed such that only differential
signals are amplified.
Analysis of Differential Amplifiers
• The analysis of differential amplifiers is simplified using “half-circuit”
concept. The equivalent circuit model for differential and common
modes are shown:
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• Differential mode gain ADM 
Vo1   o RC

  g m RC
VDM
r
• Common mode gain is ACM 
Vo1
  o RC

VCM 2(  o  1) RE  r
The Common Mode Rejection Ration (CMRR) is defined as CMRR 
•
• From the above we obtain CMRR  1  2gm RE  2gm RE
• If arbitrary signals V1 and V2 are applied to the inputs then
ADM
ACM
V1  V2 Vd

2
2
V V
 1 2
2
VDM 
VCM
V01  ADM VDM  ACM VCM
VCM
)
CMRR
 ACM VCM
ADM (VDM 
V02   ADM VDM
ADM (VDM 
VCM
)
CMRR
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FET Differential Amplifier
• A typical differential amplifier connection is shown below
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