Transcript Hardware Project Unit 4 Arithmetic & Logic Units Sau

Unit 4 Arithmetic and Logic Units
Department of Communication Engineering, NCTU
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4.1 Serial Adder with Accumulator
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Hardware Project
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
We design a control circuit for a serial adder with an
accumulator
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Operation
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
State graph for serial adder control
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Hardware Project
Unit 4 Arithmetic & Logic Units
Department of Communication Engineering, NCTU
Sau-Hsuan Wu
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4.2 A Parallel Multiplier
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Unit 4 Arithmetic & Logic Units
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A multiplier for binary positive number
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Save the product in a register
Shift the product to the right each time
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Sau-Hsuan Wu
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Hardware Project
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Datapath of the multiplier
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Hardware Project
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Operation for
a simple example
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Hardware Project
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
State graph for a straightforward implementation
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Unit 4 Arithmetic & Logic Units
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An alternative approach
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Unit 4 Arithmetic & Logic Units
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Operation using a counter
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4.3 A binary Divider
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
A parallel divider for positive numbers
A circuit to divide an 8-bit dividend by a 4-bit divisor to
obtain a 5-bit quotient
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Hardware Project
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Block diagram
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Store the dividend in a register
Shift the dividend to the left each time
An extra bit is required on the left end of the dividend
register
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Hardware Project
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
The operation for an example
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Load initial data
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Subtraction cannot be carried out without a negative result
Thus, shift the dividend to the left before we subtract
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Hardware Project
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
The quotient digit of 1 is stored in the unused position of the
dividend register
The first quotient digit
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Shift the dividend one place to the left
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Shift once again
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Unit 4 Arithmetic & Logic Units
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Subtraction is carried out, and the 3rd quotient digit of 1 is
stored in the unused position of the dividend register
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A final shift is carried out, and the 4th quotient bit is set to
zero
What if the quotient is too large > 4 bits
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If the initial left five bits  the divisor overflow
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Datapath
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Unit 4 Arithmetic & Logic Units
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The state graph
 If X8 X7 X6 X5 X4  Y3 Y2 Y1Y0  C =1
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 Sh and Sub and the quotient bit is 1
Otherwise  Sh and the quotient bit is 0
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Hardware Project
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Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Implementation with the one-hot assignment
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