Transcript EMC of ICs - Models - Alexandre

EMC Models
Summary
1. Models, what for ?
2. IC Models for EMC
3. Core Model
4. Package model
5. Test-bench models
6. Emission measurements/simulations
7. Immunity measurements/simulations
8. Conclusion
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Models – What for ?
IC DESIGNERS WANT TO PREDICT EMC BEFORE FABRICATION
Noise margin
Switching Noise on Vdd
• IC designers want to predict power
integrity and EMI during design cycle to
avoid redesign
• EMC models and prediction tools have to
be integrated to their design flows
• Short time-to-market
• Cost of redesign: several million €
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Models – What for ?
EQUIPMENT DESIGNERS WANT TO
PREDICT EMC BEFORE FABRICATION
© Siemens Automotive Toulouse
• Most of the time, EMC measurements are performed once the equipment
is built.
• No improvements can be done at conception phase.
• Predict EMC performances  IC, board, equipment optimizations
• However, need of non-confidential IC models (black box models)
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Models – What for ?
EMC VALIDATED BEFORE FABRICATION
DESIGN
Architectural
Design
Models
Design Guidelines
Training
Design Entry
Design Architect
EMC Simulations
Compliance ?
NO GO
FABRICATION
GO
EMC compliant
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IC models for EMC
EMC MODELS DEPENDS ON THE TARGETED COMPLEXITY, THE
LEVEL OF CONFIDENTIALITY OF INFORMATION.
Level
Equipment
Board
V, Z
100 V(f), 100 Z(f)
101 dipoles
Dipoles
Component
ICEM
101 R,L,C,I
LEECS
Physical
102 R,L,C,I
Expo
low
medium
104 R,L,C,I
PowerSI
high
spice
x-high
106 R,L,C,I
Complexity
Confidentiality
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IC models for EMC
GENERAL FLOW TO BUILD AN EMC MODEL IEC 62433
AND PREDICT EMC PERFORMANCES
Test bench Model
Test board Model
Package Model
Core – I/O
Model
EMC Model for
the circuit
Simulated Emission
spectrum
Electrical
Simulation
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IC models for EMC
THE IEC 62433 PROJECT
IEC 62433-2 ICEM-CE
Conducted RF emission
IEC 62433-3 ICEM-RE
Radiated RF emission
IEC 62433-4 ICIM-CI
Conducted RF immunity
IEC 62433-5 ICIM-RI
Radiated RF immunity
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IC models for EMC
THE IEC 62433 PROJECT
Conducted mode
Radiated mode
Emission
ICEM-CE
IEC 62433 - 2
ICEM-RE
IEC 62433-3
Immunity
ICIM-CI
IEC 62433-4
ICIM-RI
IEC 62433-5
Impulse immunity
IEC 62433-6
Intra-bloc EMC
IEC 62433-7
Intra-bloc
Research undergoing
Standard available
Draft of standard
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IC models for EMC
IEC 62433-2 – “ICEM Conducted Mode”
IT
IC model
IA
ICEM-CE Block A
IT
IT
ET
ET
ET
ET
ET
ET
PDN
IA
(including
package)
IT
Example : Digital core
IT
IT
IT
IBC
IT
ICEM-CE Block B
IT
IT
IT
PDN
IA
PDN
of PCB
(including
package)
IT
Example : Analog core
ET
IT
IT
ET
IT
PDN
IBC
ICEM-CE Block C
IT
IT
IT
ET
IT
IA = Internal Activity
ET
PDN
IA
PDN = Power Distribution Network
(including
package)
IT
IT
Package
IT = Internal Terminal
ET
ET
ET = External Terminal
Example : I/O buffers
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Core model
INTERNAL ACTIVITY (IA) - CURRENT SOURCE EXTRACTION
IC model
ICEM-CE Block A
IT
IA
IT
Example : Digital core
ET
IT
PDN
16(including
bit
package)
processor
IT
IT MHz IT
16
ET
ET
32 bit
processor
500 MHz
ET
IBC
IT
ITExtraction of
ET
ET
IT
ICEM-CE Block B
IT
internal
current waveform
PDN
IA
I
(including
package)
IT
I
Example : Analog core
ET
IT
IT
100 mA
PDN
of PCB
ET
3A
IT
IBC
IT
ICEM-CE Block C
IT
IA = Internal Activity
ET
ET
time
time
62.5 nsIT
2 ns
PDN = Power Distribution Network
PDN
(including : model core activity by triangular waveform current source
1st order assumption
IT = Internal Terminal
IT
IA
package)
IT
Example : I/O buffers
IT
ET
ET
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ET = External Terminal
Core model
INTERNAL ACTIVITY (IA) – FROM PHYSICAL
TO FIRST-ORDER ESTIMATION
In this course
Physical Transistor
level (Spice)
Interpolated
Transistor level
Gate level Activity
(Verilog)
Activity estimation
from data sheet
Huge simulation
Limited to analog blocks
Difficult adaptation to
usual tools
Limited to 1 M devices
Simple, not limited
Fast & accurate
Very simple, not limited
Immediate, not accurate
Activity1200
1000
800
600
400
200
00
IC model
ICEM-CE Block A
Extraction
20
40
60
80
100
12
120
140
Equivalent
Current
generator
time (ns)
IT
IA
IT
Example : Digital core
ICEM-CE Block B
IT
April 15
IA
Core model
PASSIVE DISTRIBUTION NETWORK (PDN)

Complex network of interconnections, vias and on-chip
capacitances
 Coupling path for noise through the IC
 Require extraction of impedance between Vdd and Vss.
 Possible modeling by an equivalent passive model
Equivalent passive model
Substrate, interconnections
metallization
Capacitive
behavior
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Core model
ICEM IN IC-EMC - DOUBLE LC SYSTEM
ICEM-CE model
(IEC 62433-2)
IC model
Package model
External
VDD
External
VSS
Rvdd
Lvdd
IA
LPackVdd
LPackVss
PDN
Cd
Cb
Rvss
Primary
resonance
IA
Lvss
Secondary
resonance
Emission
level
Low L,C values =>
High resonant frequency
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April 15
Frequency
Core Model
ADDING IOS - IBIS: INPUT BUFFER I/O
SPECIFICATION
[IBIS Ver] 2.1
IBIS file
[Date]
March 17,2011
[File Name] dsPIC33FJ128GP706.ibs
[File rev] 1.0
[Component] dsPIC33FJ128GP706
[manufacturer] MICROCHIP
[Package]
|
R_pkg
19.05m 21.2m 16.9m
L_pkg
3.025nH 2.61nH 3.44nH
C_pkg
0.269pF 0.268pF 0.270pF
…
Output driver I(V)
characteristics
Very important for :
 I/O switching noise prediction
 I/O immunity prediction
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Input driver I(V)
characteristics
April 15
Core Model
IC PIN DECLARATION - MODELS
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Core Model
MODEL DETAILS
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Core Model
ADDING IOS – SIGNAL TRANSPORT
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Package Model
CASE STUDY – DSPIC 33F

On-chip decap
 Package
inductance
z11-dspic-vdd_10-vss_9.z
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Emission measurement/simulation
CONDUCTED/RADIATED
EMISSION PREDICTION
Simulations
Board
Model
Core
Model
Measurements
Elec. package
Model
DUT
1
IC Model
Time Domain
Simulation
To receiver
Spectrum
analyzer
FFT of Vanalyzer(t)
EMC model
Compare spectrums
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Measurements
Emission measurement/simulation
ICEM-CE CASE STUDY – DSPIC 33F

Core only
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April 15
Emission measurement/simulation
ICEM-CE CASE STUDY – DSPIC 33F

Core + 16 ADDR
 20dB more noise
than core
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Emission measurement/simulation
ICEM-RE – CURRENT DIPOLE THEORY

H P  
H1


Hi
i
P
H2
Vss
I(vss)
chip
H
Vdd
r
I(vdd)
P
L I
Magnetic near field scan of a 16
bit microcontroller
 Package is the main contributor of the radiated emission of an IC
 Magnetic field emission is generated by the flowing of parasitic current
through package pins
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Emission measurement/simulation
ICEM-RE – SIMULATION/MEASUREMENT
Scan Simulations
VssX1
Scan Measurements
VssA
Vdd1
Vss1
Vss2
Vdd2
VssX2
VssR2
VssR1 VddR1
Core
Model
Elec. package
Model
Geometrical
package model
Spectrum
analyser
Analog Time Domain
Simulation
Positionning
[x,y]
H[x,y] at given f,
given z
Fourier Transform of I(t)
H[x,y,z] of I(f)
Compare scans
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Emission measurement/simulation
ICEM-RE – RADIATING DIPOLES
PDN
IT
IA
IT
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IC models for EMC
IEC 62433-4 – “ICIM CONDUCED IMMUNITY”
PDN
• The package and die
impedance act as a coupling
path for RF interference (Vin,
Iin) to the active blocks,
RF
Disturbances
Passive
elements
Vin, Iin
Residual
disturbances
Vr, Ir
• Filtering effect and/or distortion
through the PDN and produce
(Vr,Ir).
IB

• The IB block describes how
the circuit reacts to internal
perturbations, and can be
represented as (Vout,Iout) for
monitoring the failure
Active
elements
Behavioural
output
Vo, Io
IEC 62433-4
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IC models for EMC
IEC 62433-4 – “ICIM CONDUCED IMMUNITY”
IB
ICIM – immunity model
Package
RF
disturbance
Coupling
path
Monitoring of the
failure
External
pins
IC PDN
Internal
Behaviour
IB
Package
PDN
detection
Silicon die
PDN = Passive Distribution Network
Close to ICEM-CE
PDN
Close to ICEM
Add Diodes
(camp, back-toback, ESD, EOS)
New!
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Package
IC models for EMC
IEC 62433-4 – “ICIM CONDUCED IMMUNITY”
RF
generator
model
Injection
model
Coupling
path
model
+ Perturbation + Injection
+ DUT power
source
supply
device
model
+ Extraction
of power
+ PCB model + DUT input
structure
injection
model
+ Passive
Decoupling
Network
(PDN)
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Functionnal
model
Susceptibility
criterion
+ Internal
Behavior
(IB)
Power limit
+ Behaviour of
sensitive &
non-linear
parts
Voltage
threshold
Overcurrent
SNR
degradation
LSB
degradation
….
April 15
Susceptibility measurement/simulation
From
ICEM
SUSCEPTIBILITY PREDICTION MODEL
Amplitude
Coupling
path model
From
IBIS
Vdd
input
Time
clock
Functional
model
output
Resonance
Vss
Disturbance model
I/O
Supply network Z(f)
IC model
 ICIM – CE immunity model
 Reuse of standard non-confidential models (ICEM, IBIS)
 Susceptibility peaks linked with supply network anti-resonances
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Susceptibility measurement/simulation
SUSCEPTIBILITY SIMULATION FLOW
Aggressed IC
Model (ICEM)
IC-EMC
Package
and IO model (IBIS)
RFI and coupling
path model (Z(f))
Set RFI frequency
Increase V aggressor
WinSPICE
Increase RFI
frequency
Time domain simulation
Susceptibility threshold
simulation
Criterion analysis
IC-EMC
Extract forward power
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Test bench model
TEST BENCH MODEL
 Electrical model extracted by S parameter measurements and electromagnetic
simulations
 Test bench models should be generic
 Limited frequency range due to influence of parasitic elements, apparition of
high order propagation mode
DUT
C=20fF
R=1Ω L=4nH
K=1%
C=1nF
R=15mΩ
K=6%
L=0.5nH
TEM
TEM Cell
DPI capacitance
DPI injection
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DUT
Near-field scan
Susceptibility case study
DPI ON A 330 OHM LOAD
Immunity > Dpi330ohm
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Conclusion
•
EMC models can help earn/save money
•
Macro-models of ICs include core, I/O and package modeling
•
The core model is based on current evaluation and on-chip
capacitance
•
The package model is based on RLC
•
Good prediction of emission and susceptibility up to 2 GHz
•
Soon, requirements up to 3-10 GHz
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