CMFB, One-Stage Op-Amp

Download Report

Transcript CMFB, One-Stage Op-Amp

Operational Amplifier (1)
Chapter 9
Topics
• Common-Mode Feedback
• One Stage Op-Amps
• Two Stage Op-Amps
Necessity of Common-Mode
Feedback
I3 is approximately 0.99I5 (due to mismatch in current source)
VX and VY will rise.
M5-M8 will enter the triode region.
Mechanism
VX and VY will rise if IR1/2>I1, pushing M5-M8 to the triode region.
VX and VY will drop if IR1/2<I1, pushing M9 into the triode region.
Solution: Common-Mode Feedback Circuit
Caution
A common-mode feedback (CMFB) circuit
is not necessary since the VD1 and VD2 are well-defined.
Rule of thumb: if the output CM level cannot be determined
by “visual inspection”, and requires calculations based
on device properties, then it is poorly defined.
Conceptual Topology for
Common-Mode Feedback
(Sensing)
(Return error to
the amplifier’s bias network)
(Comparison with a reference)
Resistive Sensing (1)
Constraints:
R1+R2 must be
much larger than
the resistance into
the drain of NMOS and
PMOS so as to avoid lowering
the open-loop gain
(I12)
(negligible)
Large R1 and R2 are required.
Vout, cm=(Vout2-Vout1)/(R1+R2)+Vout1
=Vout2(R1/(R1+R2))+Vout1(R2/(R1+R2))
If R1=R2,
Vout, cm=(Vout1+Vout2)/2
Resistive Sensing (2.1)
Resistance seen into the source terminal of
M7 and M8 are much smaller than R1+R2.
Vout, cm=(Vs8-Vs7)/(R1+R2)+Vs7
=Vs8(R1/(R1+R2))+Vs7(R2/(R1+R2))
If R1=R2,
Vout, cm=(Vs7+Vs8)/2=(Vout2-Vgs8+Vout1Vgs7)/2=(Vout2+Vout1)/2-(Vgs8+Vgs7)/2
Resistive Sensing (2.2)
(If M7 turns off, Vout, CM no longer represents the true output CM level)
Solution:
1. R1+R2 should still be sufficiently large so the current through R1+R2
Is small compared to I1.
2. Use a large I1.
Resistive Sensing (2.3)
Minimum Vout1, Vout2 without CMFB: VOD3 +VOD5.
Minimum Vout1, Vout2 with CMFB: VGS7,8+VOD,I1.
Since VGS7,8+VOD,I1> VOD3 +VOD5,less output swing is allowed
With CMFB.
Resistive Sensing (3.1)
(Deep triode region)
Vout2+Vout1~ Vout,cm
Vout,cm increases, Rtot drops.
Vout,cm decreases, Rtot increases.
Resistive Sensing (3.2)
(Deep triode region)
Vout2+Vout1
=Vout,cm-ΔV+Vout,cm+ΔV
=Vout,cm
Rout depends on Vout,cm
Resistive Sensing (3.3)
Vth,78
(Deep triode region)
Vp is designed to place M7,8 in triode.
Vout, cm is approximately VDD/2.
Vp ≤ Vout,cm-Vth7,8 =VDD/2-Vth7,8
Vout2 is brought down to Vth7,8 during a negative swing.
Is VDS8≤VGS8-Vth7,8?
VGS8-Vth7,8=Vth7,8-Vth7,8=0
VDS8 =VDD/2-Vth7,8>0
So VDS8 is not less than VGS8- Vth7,8. There fore M8 is in saturation,
M8 is not longer is the deep triode region.
Sensing (4.1)
VGS,C6=Constant, not sensitive to
differential output signal.
Sensing (4.2)
VGS,C6 increases in response to a rise in
Vout, cm
Return the Error Signal (4)
Return the Error Signal (1)
Return the Error Signal (1)
Return the Error Signal(3.1)
Vout2+Vout1~ Vout,cm
Vout,cm increases, Rtot drops.
Vout,cm decreases, Rtot increases.
Return the Error Signal(3.2)
Return the Error Signal(3.3)
Sensitivity of Vb
(output voltage is sampled,
Voltage subtraction at the input(Vb))
Voltage-Voltage Feedback
Voltage-Voltage Feedback
(Review)
Sensitivity of Vout,cm due to Vb
(Maximize VDS7,8 to reduce sensitivity of Vb!)
Device Sensitivy M7 and M8
Removed
Let (W/L)15=(W/L)9 and (W/L)16=(W/L)7+(W/L)8
ID9=I1 only when Vout, cm=VREF!
Vout,cm>VREF
Let (W/L)15=(W/L)9 and (W/L)16=(W/L)7+(W/L)8
ID9=I1 only when Vout, cm=VREF!
Simplified Design
VDS15=VDS9 Design
One-Stage Amplifier
Simple One-Stage Op Amps
Mirror
Pole
(No mirror pole)
Unity Gain Amplifier
Open loop output impedance:
Loop gain:
Closed loop output impedance:
Telescopic Op Amps
(gain)
Design Criteria
• Desirables:
– IOUT should be IREF. (i.e. VX=VY)
– Vout should be minimized. (i.e. VOD2+VOD3)
VOUT=VOD3+VOD4
VA=VB→IOUT=mIREF
Increased Vout, max
(Vout, max)
(Increased Vout, max)
Drawback of Telescopic
Cascode
(Condition for keeping M2 and M4 in Saturation)
Folded Cascode Circuits
Differential Folded Cascode
(Extra power compared to telescopic)
Folded Cascode with cascode
PMOS
Gain Calculation
Less gain
Non-dominant Pole Comparison