Transcript slides
Optimizing Tests for
Multiple Fault Models
Nitin Yogi and Vishwani D. Agrawal
Auburn University
Department of ECE
Auburn, AL 36849, USA
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
May 16-18, Boxborough, Massachusetts
1
Outline
Multiple fault models
Multiple Fault Model Test Minimization
Results
Hybrid LP-ILP method
Minimization of total number of vectors
Minimizing IDDQ measurements
Results
Combined ILP model
Importance
Minimization problem
Results
Conclusion
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
2
Multiple Fault Models
Importance
Each fault model targets specific defects
Sematech study (Nigh et. al. VTS’97) concluded …
Combine test sets covering different fault models
To detect most defects, tests for all fault models need to included
Concatenating test sets - number of vectors grows rapidly
Minimization problem
Obtain minimized test set for considered fault models
Take advantage of vectors detecting faults in multiple fault models
Fault simulator/ATPG handles only one fault model at a time
May 17, 2007
Need for a new minimization approach
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
3
Conventional Test Vector Minimization
(one fault model at a time)
Mentor Fastscan vectors
Un-minimized
Minimized
Fault Cov.
(%)
Stuck-at
167
130
96.00
IDDQ(pseudo stuck-at)
53
45
99.09
Transition
299
229
96.55
Total
519
404
-
Stuck-at
150
145
99.30
IDDQ(pseudo stuck-at)
71
70
85.75
s5378 LOS
319
293
98.31
LOC
256
242
90.05
Total
796
750
-
Circuit
c3540
Type of vecs
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
4
Multiple Fault Model
Test Minimization
Obtain fault dictionary by fault simulations
Determine faults detected by each vector
‘F’ faults : for all considered fault models
‘N’ vectors : generated for all considered fault models
ILP test minimization
Set of integer [0,1] variables { tj } – one for each vector
Set of constraints { ck } – one for each fault
tj = 0: drop vector ; tj = 1: select vector
Example: for kth fault detected by vectors u, v and w
ck : tu + tv + tw ≥ 1
Objective function
May 17, 2007
Minimize ∑ tj ; j = 1 to N
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
5
Finding vectors for IDDQ measurements
Given minimized set of ‘n’ vectors, define:
Integer [0,1] variables { tj } – one for each vector
Constraints { ck } – one for each IDDQ fault
tj = 0 : drop vector j ; tj = 1 : select vector j
Example: for kth IDDQ fault detected by vectors u, v and w
ck : t u + t v + t w ≥ 1
Objective function
Minimize ∑ tj ; j = 1 to n
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
6
Multiple fault model test minimization
Circuit
c3540
s5378
No. of
vectors /
IDDQ
meas.
Mentor Fastscan
Vecs / IDDQ
Vecs / IDDQ
Vectors
519
IDDQ
Original
ILP
Optimized
Vecs / IDDQ
CPU$
(s)
404
225
41
53
45
39
694
Vectors
796
750
320
148
IDDQ
71
70
84
14
* CPU time limit of 5000 exceeded
Need to
further reduce
IDDQ meas.
$
SUN Sparc Ultra 10, four CPU machine with
4.0 GB shared RAM
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
7
Combined ILP
Define two integer [0, 1] variables:
{ tj , ij } – one for each vector ; j = 1 to N
May 17, 2007
tj = 0 : drop vector j
tj = 1 : select vector j
ij = 0 : no IDDQ measurement for vector j
ij = 1 : measure IDDQ for vector j
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
8
Combined ILP (cont.)
Constraints {ck}
For kth fault detected by vectors u, v and w
ck : tu + tv + tw ≥ 1
iu + iv + iw ≥ 1
tu ≥ iu
tv ≥ iv
tw ≥ iw
May 17, 2007
Only if jth fault
is an IDDQ fault
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
9
Combined ILP (cont.)
Objective function
Minimize
N
j=1
j=1
{ ∑ tj + W × ∑ ij }
N : total number of vectors
tj : variables to select vectors (IDDQ or non-IDDQ)
ij : variables to select IDDQ measurements
W : weighting factor
May 17, 2007
N
How strongly to minimize IDDQ vectors
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
10
Results – Combined ILP
Ckt
c3540
s5378
Two-step ILP
Combined ILP
No. of
vecs.
/ IDDQ
meas.
Vecs
/ IDDQ
CPU
(s)
Vecs
225
41
225
IDDQ
39
694
40
Vecs
320
148
320
IDDQ
84
14
78
$
W = 0.1
Vecs
/ IDDQ
CPU$
(s)
5044*
2314
W=1
Vecs
/ IDDQ
226
CPU$
(s)
5047*
41
326
5154*
73
W = 10
Vecs
/ IDDQ
247
37
353
64
CPU$
(s)
5047*
5161*
* CPU time limit of 5000 exceeded
$
SUN Sparc Ultra 10, four CPU machine with 4.0 GB shared RAM
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
Need for
reducing
CPU time
11
Hybrid LP – ILP
Approximate solution to ILP
Algorithm:
1.
2.
All variables redefined as real [0,1] real variables (LP model)
Loop :
1.
2.
Solve LP
Round variables {tj} , {ij} to add constraints
1.
2.
3.
3.
Round to 0 if ( 0.0 < variables ≤ 0.1)
Round to 1 if ( 0.9 ≤ variables < 1.0)
Exit loop if no variables are rounded
Reconvert variables to [0,1] integers and solve ILP
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
12
Results - Hybrid LP - ILP minimization
Combined ILP model
Ckt.
c3540
s5378
No. of
vecs.
/ IDDQ
meas.
Hybrid LP – ILP solution
ILP solution
W = 0.1
Vecs
/ IDDQ
Vecs
225
IDDQ
40
Vecs
320
IDDQ
78
W=1
CPU$
(s.)
5044*
2314
Vecs
/ IDDQ
226
41
326
73
CPU$
(s.)
5047*
5154*
W = 10
Vecs
/ IDDQ
247
37
353
64
CPU$
(s.)
5047*
5161*
W = 0.1
Vecs
/ IDDQ
225
41
320
80
CPU$
(s.)
167
529
W=1
Vecs
/ IDDQ
226
39
326
72
CPU$
(s.)
189
617
W = 10
Vecs
/ IDDQ
CPU$
(s.)
248
516
34
353
793
63
* CPU time limit of 5000 exceeded
Order of magnitude
reduction in CPU time
$
SUN Sparc Ultra 10, four CPU machine with
4.0 GB RAM shared among 4 CPUs
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
13
How good is Hybrid Optimization?
Circuit
c3540
s5378
Weight
(W)
Minimized (vectors + W x IDDQ measurements)
Lower Bound
ILP
Hybrid LP – ILP
0.1
227.94
229*
229.1
1
257.82
267*
265
10
499.97
617*
588
0.1
326.76
327.8
328
1
392.28
399*
398
10
910.68
993*
983
* CPU time limit of 5000 exceeded
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
14
Conclusion
Proposed technique
Minimizes test vectors for multiple fault models
Minimizes IDDQ measurements.
Cost Trade-off
Vector Length and IDDQ measurements
Hybrid LP – ILP procedure reduces time
complexity of the solution
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
15
Thank You!
Any questions please ?
May 17, 2007
North Atlantic Test Workshop (NATW) 2007,
16-18, Boxborough, Massachusetts
May
16