Transcript CS120: Lecture 5 MP Johnson Hunter College

CS120: Lecture 5
MP Johnson
Hunter College
[email protected]
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Agenda
• Review binary bin add
– Bin mult?
– 2’s comp?
• Machine language & processors
• More on data?
– Compression
– Error detection & correction
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Next: Comp architecture
• Last time: data
– Rep dig. Data w/ gates, FFs
– Also saw: can compute w/ circuits
– But: modern comps are general-purpose
• CD player, not musicbox
• So this time: computer arch
– How comps perform general comps, in M.L.
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CPU: central proc unit
•
PC has many parts, but brain is CPU
– Chip on the motherboard – Pentium, PowerPC
•
Has 3 parts:
1. ALU
– math/logic
2. Control unit
– Tracks progress
3. Registers
– Temporary storage
– To use data, first copied from RAM
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CPU and RAM connected via a bus
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e.g. computation: add
• Add 2 values
from RAM, store
sum in RAM
• Steps:
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Von Neumann arch
• Big idea: no special-purpose machine built to
perform this list
• Instead,
– Machine can do basic things, including each type of
operation here
– This particular list is data
• Data saying what to do
• = a program
• Named after John Von Neumann
• Q: How to encode these instructions?
• A: Machine language
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e.g. M.L.
• Each processor has own M.L.
• Text presents simple example M.L.:
– 16 registers, numbered 0-F (hex)
• Each store1 1 byte
• Because 16, need 4 bits / 1 hex to refer
– 256 bytes in RAM
• Because 256, need 8 bits / 2 hex to refer
• (modern machines are 32-bit or 64-bit)
• Each instr is 16 bits / 4 hex long
– 4/1 ~ op, 12/3 ~ operands
– Write in hex for convenience
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Op ops
Data:
1 RXY
2 RXY
3 RXY
4 0RS
Math/logic:
5 RST
6 RST
7 RST
8 RST
9 RST
A R0X
Control:
B RXY
C 000
descrip
Sample ML
R,S = reg,
LOAD val from Ram XY to reg R
XY = RAM
LOAD val XY to reg R
STORE val from reg R in Ram XY
MOVE val from reg R to S (ignore 0)
ADD vals in S and T (2’s comp)  R
ADD vals in S and T (float pt)  R
OR (bitwise) vals in S and T  R
AND (bitwise) vals in S and T  R
XOR (bitwise) vals in S and T  R
ROTATE val in R X places to right (ignore 0)
JUMP to instr in Ram XY, if val in reg R = 0
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HALT (ignore 0s)
Machine lang instructions
• Op-code: specifies operation
• Operand: inputs op is performed on
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Eg: Add 2 values stored in RAM
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Pgm execution: Machine cycle
• Process performed one instr at a time
• Process run by control unit, with 2 special
registers:
– Pgm counter (P.C.): store addr of next instr
– Instr reg (I.R.): stores current instr (2 bytes)
• On each fetch, control unit
– Copies val at *PC into IR
– Sets PC to PC+2 (unless jump)
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Machine cycle
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Program exec e.g.: add
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Program exec e.g.: add
• First, program is put in RAM
• Starting address is put in PC
• Machine cycle starts:
– 156C put in IR, PC set to A2
– Control unit reads IR, does LOAD
– Ram 6C  reg 5
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fetch
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Other ALU ops: logic
• Saw gate for 1, 2 bits
• Data usually stored in bytes
• Can add bitstrings as numbers
• Also can do logic ops, bitwise
– Each column independently
• Also used to set certain bits
– B AND 00001111, B OR 11110000
• XOR for comp:
– B XOR 11111111
• Shift/rotate left/right
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notes
1. Program is just data in mem, that’s interp’ed as
instructions
•
•
If addr of plain data were put in PC, unpredictable
behavior
Or could jump from one program to another
•
In practice, OS limits where program can read
2. Here just had registers and RAM
•
Can also have cache: small, fast mem, close to
processor (Kb-Mb)
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notes
3. Instructions here are all 2 bytes
•
Real processors may have var-len instrs
4. CISC v. RISC
•
•
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Reduce minus to add, neg
Reduce mult to add
Reduce comp to XOR
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notes
3. Speed measured in Hz = machine cycles/s
•
•
MHz, GHz = 1000MHz
Work per cycle varies by processor 
benchmarking
•
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Elec pulses travel at speed of light
 challenge: minimize dist traveled
•
Hard lims on speed/op  maximize work/time
–
–
“throughput”
“pipelining”
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Comm w/devices
• Not just RAM
• To send msg,
STORE-like op
• To receive, LOAD
• E.g: printer sends
status msg
• Partic device’s
range of addrs =
port
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Machines  OS
• Can now write programs
• Complex programs still very difficult
• I/O, mem management, etc.
• Need an operating system
• For next time: Stephenson
• Hw posted over weekend
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