AC Diode Characteristics R3 Resistor network supplies DC bias set point

Download Report

Transcript AC Diode Characteristics R3 Resistor network supplies DC bias set point

AC Diode Characteristics
R3
Resistor network supplies DC bias set point
Capacitor provides AC signal input
Vout=IdiodeR3
ECE 663
AC small signal resistance
ECE 663
Small signal AC conductance
1 dI
d



J s Ae qV / kT  1
R dV dV
q
q
g
I (V ) 
Idc (Vdc )
kT
kT
g
Small Signal AC resistance
R
1 kT  1 



g
q  Idc (V ) 
Resistance depends on DC set point – voltage controlled resistor
ECE 663
An equivalent circuit
rd
Reactance:
1
Y
g d  i    Cd
Z
1
 i    Cd
rd
Cd
rd, Cd vary with VDC !!!
Let us work out Y for reverse bias first
ECE 663
Reverse Bias Conductance
I
V
I = I0(e-qVBR/kT -1) ≈ -I0
I constant with reverse bias voltage  gd ≈ 0
Reverse Bias (‘Depletion’) Capacitance
•
•
•
•
AC voltage modifies depletion width
Depletion width changes small
Looks like adding charges to parallel plates
AC capacitance
K s 0 A
CJ 
W
ECE 663
RB capacitance C-V measurements
K s 0 A
CJ 
W
 2K 

W   s 0 Vbi  VA 
 qNB

 qNB K s  0 
CJ  

 2Vbi  VA 
2Vbi  VA 
1

2
qNB K s  0
CJ
1/ 2
1/ 2
• Plot of 1/C2 vs V is a straight line (constant doping) and the
slope gives doping profile.
• Y-intercept gives built-in voltage
ECE 663
ECE 663
So reverse bias equivalent circuit
Rs
K s 0 A
CJ 
W
Notice that for reverse bias, circuit parameters are frequency
independent, as if we’re in DC characteristics.
Why?
ECE 663
Reverse bias p-n junction is a majority carrier device
Very few minority carriers have made it to the opposite side
Depletion width change requires flow of majority carriers
(n from n-side and p from p-side flow in and out)
Since majority carriers move very fast by drift, they can
follow the AC field instantly, so the response is ‘quasi-static’
ECE 663
Just how fast are majority carriers?
Drifting charges, with fields in turn determined by charge
∂n/∂t = -(1/q)∂Jn/∂x + (gN - rN)
Jn = qnmnE + qDN∂n/∂x ≈ qnmnE ≈ snE
Ks0 ∂E/∂x = q(p - n + ND+ - NA-) ≈ -qn
∂n/∂t = -n/t
t = Ks0/sn
(Dielectric Relaxation Time)
ECE 663
How fast is it?
t = Ks0rn
Ks = 11.9
0 = 8.854 x 10-12 F/m
rn (@ doping 1015/cm3) ~ 4 W-cm
t ≈ 5 ps !
As long as fields are not too fast ( < 10 GHz), charges
follow field quasi-statically
ECE 663
Let’s now go to forward bias
ECE 663
Capacitance in Forward Bias
np ( x)
pn ( x')
Stored charge = excess minority carriers
ECE 663
AC field varies minority carrier pileup (recall law of the junction)
p(xn) = (ni2/ND)[eq(V + vac)/kT – 1]
ECE 663
Also, minority carriers are slow and may
not follow AC field quasi-statically
Thus we expect circuit parameters
to be frequency-dependent !
ECE 663
How fast are minority carriers?
t ≈ 1/NTsTvt
(Minority carrier lifetime)
NT ~ 1012/cm3 (for NA ~ 1014/cm3)
sT ~ p(10-10m)3
vt = 3kT/m ~ 105m/s
t ≈ 300 ms
So for fast fields ( >> 1/t), expect carriers
to go out of phase, leading to
freq-dependent circuit parameters
ECE 663
But how do we include such
phase lag effects?
ECE 663
Back to MCDE
∂n/∂t = DN∂2n/∂x2 – n/tn
Can’t drop this at AC fields !!
jn
Back to MCDE
0 = DN∂2n/∂x2 – n(1+jtn)/tn
tn  tn/(1+jtn)
So in Shockley equation
I = qA(ni2/ND)DN (1+jtn) /tn
x [eq(V + vac)/kT – 1]
idiff = G0(1+jtn)vac
idiff = (Gd + jCd)vac
Square root of (1+jtn)
1 + jt = Aejq
A = (1 + 2t2)
q = tan-1(t)
Real(1+jt) = A1/2cos(q/2)
Im(1+jt) = A1/2sin(q/2)
cosq = 1/(1+ 2t2)
= 2cos2(q/2) - 1
= 1 – 2sin2(q/2)
Re(1+jt) = Gd
Im(1+jt) = jCd
Gd()/G0 ~ 
Cd()/C0 ~ 1/
1
t
For high frequency (t >> 1), minority carriers can’t
follow fields, so capacitance goes down and the p-n
junction becomes ‘leaky’ so its conductance goes up
In summary
• Reverse bias is a depletion capacitance, zero
conductance
• It looks like a DC capacitance, except its width
depends on voltage
• Forward bias looks like a frequency dependent
diffusion capacitance and a diffusion
conductance to give an overall admittance