Karnaugh Map; K-Map 2016/5/26 1 NTU DSD (Digital System Design) 2007
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Transcript Karnaugh Map; K-Map 2016/5/26 1 NTU DSD (Digital System Design) 2007
Karnaugh Map; K-Map
2016/5/26
Jackie NTU
Kan - 2007
([email protected]/[email protected])
DSD
(Digital System Design) 2007
http://linton.1d24h.com/~jackiekan/
1
Karnaugh Map (K-Map;卡諾圖)
K-Map是另一種化簡布林代數的視覺化工具(Min-Term Based)
超過 5 個變數時，不易使用
A
B
0
1
0
1
0
1
2
3
CD
AB 00 01 11 10
00
0
1
3
2
2 Variable
K-Map
01
11
BC
A 00 01 11 10
0
0
1
3
2
1
4
5
7
10
4
5
7
6
12
13
15
14
8
9
11
10
4 Variable
K-Map
6
3 Variable
K-Map
Numbering Scheme: 00, 01, 11, 10
Gray Code: only a single bit changes from code word to next code word
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
2
卡諾圖的相鄰性
第一個 Column 與最後一個 Column 是相鄰的
第一個 Row 與最後一個 Row 是相鄰的
CD
AB 00 01 11 10
00
0
1
3
2
01
11
10
4
5
7
6
12
13
15
14
8
9
11
10
BC
A 00 01 11 10
0
0
1
3
2
1
4
5
7
011
010
111
110
001
B
000
ABC
2016/5/26
6
101
C
A
100
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
3
K-Map Example
A
B
0 1
0 10 11
A
1 02 03
A
B
0 1
0 00 11
1 02 13
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B
0 1
0 10 11
1 02 03
A
A’ 不變，B 變動
F(A,B) = A'B' + A'B = A'(B'+B) = A’
B
0 1
0 00 11
1 02 13
B 不變，A 變動
F(A,B) = A'B + AB = B(A'+A) = B
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
4
K-Map Example
BC
BC
A 00 01 11 10 A 00 01 11 10
0 10 0 1 0 3 1 2
0 10 0 1 0 3 1 2
1 04 05 07 06
1 04 05 07 06
BC
BC
A 00 01 11 10 A 00 01 11 10
0 10 1 1 1 3 1 2
0 10 1 1 1 3 1 2
1 04 05 07 06
1 04 05 07 06
BC
BC
A 00 01 11 10 A 00 01 11 10
0 10 0 1 0 3 1 2 0 10 0 1 0 3 1 2
1 14 05 07 16
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1 14 05 07 16
F(A,B,C)
= A'B'C' + A'BC'
= A'C'(B'+B)
= A’C'
F(A,B,C)
= A'B'C' + A'B'C+A'BC+ABC'
= A' (B'C'+B'C+BC+BC')
= A’
F(A,B,C)
= A'B'C' + AB'C'+A'BC'+ABC'
= C' (A'B'+AB'+A'B+AB)
= C’
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
5
K-Map Example : Multiple Grouping
多重群組之運用
以盡量涵蓋所有的 ‘1’ 為目標，且涵蓋的區域越大越好
若找不到相鄰的 ‘1’，單一點亦是允許的
BC
A 00 01 11 10
0 10 11 03 02
BC
A 00 01 11 10
0 10 11 03 02
1 04 15 07 06
1 04 15 07 06
BC
A 00 01 11 10
0 10 1 1 0 3 0 2
F(A,B,C)
= (A'B'C' + A'B'C)+(A'B'C + AB'C)
= (A'B'(C'+C)) + (B'C(A'+A))
= A'B' + B'C
1 04 15 07 06
BC
A 00 01 11 10
0 10 11 03 02
BC
A 00 01 11 10
0 10 11 03 02
1 04 05 07 16
1 04 05 07 16
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F(A,B,C)
= (A'B'C' + A'B'C)+ABC'
= (A'B'(C'+C)) + ABC'
= A'B' + ABC'
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
6
K-Map Example : Illegal Grouping
A’B’C’ 與 AB’C 無法形成一個
單一的 product term
BC
A 00 01 11 10
0 10 01 03 02
1 04 15 07 06
F(A,B,C)
= A'B'C' + AB'C
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
7
K-Map Example
CD
AB 00 01 11 10
00 0 0 0 1 0 3 0 2
01 0 4 0 5 0 7 0 6
11 1 12 0 13 1 15 0 14
10 1 8 1 9 0 11 1 10
CD
CD
CD
CD
AB 00 01 11 10 AB 00 01 11 10 AB 00 01 11 10 AB 00 01 11 10
00 0 0 0 1 0 3 0 2 00 0 0 0 1 0 3 0 2 00 0 0 0 1 0 3 0 2 00 0 0 0 1 0 3 0 2
01 0 4 0 5 0 7 0 6
01 0 4 0 5 0 7 0 6
01 0 4 0 5 0 7 0 6
01 0 4 0 5 0 7 0 6
11 1 12 0 13 1 15 0 14
11 1 12 0 13 1 15 0 14
11 1 12 0 13 1 15 0 14
11 1 12 0 13 1 15 0 14
10 1 8 1 9 0 11 1 10
10 1 8 1 9 0 11 1 10
10 1 8 1 9 0 11 1 10
10 1 8 1 9 0 11 1 10
F(A,B,C,D) = AC'D' + AB'D'+AB'C+ABCD
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
8
K-Map Example
CD
AB 00 01 11 10
00 1 0 0 1 0 3 1 2
CD
AB 00 01 11 10
00 1 0 0 1 0 3 1 2
CD
AB 00 01 11 10
00 1 0 1 1 1 3 1 2
01 1 4 0 5 0 7 1 6
01 0 4 0 5 0 7 0 6
01 1 4 0 5 0 7 1 6
11 112 013 015 114
11 012 013 015 014
11 112 013 015 114
10 1 8 0 9 011 110
10 1 8 0 9 011 110
10 1 8 1 9 111 110
CD
AB 00 01 11 10
00 1 0 0 1 0 3 1 2
CD
AB 00 01 11 10
00 1 0 0 1 0 3 1 2
01 1 4 0 5 0 7 1 6
01 0 4 0 5 0 7 0 6
11 112 013 015 114
11 012 013 015 014
10 1 8 0 9 011 110
10 1 8 0 9 011 110
F(A,B,C,D) = D'
F(A,B,C,D) = B'D'
CD
CD
00
01
11
10
AB
AB 00 01 11 10
00 1 0 1 1 1 3 1 2 00 1 0 1 1 1 3 1 2
01 1 4 0 5 0 7 1 6 01 1 4 0 5 0 7 1 6
11 112 013 015 114 11 112 013 015 114
10 1 8 1 9 111 110
10 1 8 1 9 111 110
F(A,B,C,D) = D’ + A’B’D + AB’D
F(A,B,C,D) = D’ + B’
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
9
Don't Care Terms
輸入變數的輸入的某些組合對於輸出項不會產生任何影響者
又稱 “Don't Care Terms”(不在意項)
在以卡諾圖化簡時，隨意項可以被當作“0”或“1”，以造出較大的Face，以
簡化邏輯式
Marked by "X" in K-Map
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
10
K-Map Example
F= Σm(8,9,12)+D(3,7,10,11,14,15)
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
01 0 4 0 5 X 7 0 6
01 0 4 0 5 X 7 0 6
01 0 4 0 5 X 7 0 6
11 1 12 0 13 X 15 X 14
11 1 12 0 13 X 15 X 14
11 1 12 0 13 X 15 X 14
10 1 8 1 9 X 11 X 10
10 1 8 1 9 X 11 X 10
10 1 8 1 9 X 11 X 10
F(A,B,C,D) = AC'D' + AB'C'
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
01 0 4 0 5 X 7 0 6
01 0 4 0 5 X 7 0 6
11 1 12 0 13 X 15 X 14
11 1 12 0 13 X 15 X 14
10 1 8 1 9 X 11 X 10
10 1 8 1 9 X 11 X 10
F(A,B,C,D) = AD' + AB'
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
11
K-Map Example
F= Σm(4,5,6,8,9,10,13)+D(0,7,15)
CD
AB 00 01 11 10
00 X 0 0 1 0 3 0 2
CD
AB 00 01 11 10
00 X 0 0 1 0 3 0 2
CD
AB 00 01 11 10
00 X 0 0 1 0 3 0 2
01 1 4 1 5 X 7 1 6
01 1 4 1 5 X 7 1 6
01 1 4 1 5 X 7 1 6
11 0 12 1 13 X 15 0 14
11 0 12 1 13 X 15 0 14
11 0 12 1 13 X 15 0 14
10 1 8 1 9 0 11 1 10
10 1 8 1 9 0 11 1 10
10 1 8 1 9 0 11 1 10
CD
AB 00 01 11 10
00 X 0 0 1 0 3 0 2
01 1 4 1 5 X 7 1 6
11 0 12 1 13 X 15 0 14
10 1 8 1 9 0 11 1 10
F(A,B,C,D) = A’B + AC’D + AB’D’
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
12
5-Inputs K-Map
DE
BC 00 01 11 10
00
0
1
3
2
A=0
01
11
10
4
5
7
6
12
13
15
14
8
9
11
10
DE
BC 00 01 11 10
00 16 17 19 18
01
A=1
11
10
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20
21
23
22
28
29
31
30
24
25
27
26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
13
K-Map Example
F(A,B,C,D,E) = Σm(2,5,7,8,10,13,15,18,20,21,23,28,29,31)
DE
BC 00 01 11 10
00 0 0 0 1 0 3 1 2
A=0
A=1
01 0 4 1 5 1 7 0 6
DE
BC 00 01 11 10
00 0 0 0 1 0 3 1 2
A=0
01 0 4 1 5 1 7 0 6
DE
BC 00 01 11 10
00 0 0 0 1 0 3 1 2
A=0
01 0 4 1 5 1 7 0 6
11 0 12 1 13 1 15 0 14
11 0 12 1 13 1 15 0 14
11 0 12 1 13 1 15 0 14
10 1 8 0 9 0 11 1 10
10 1 8 0 9 0 11 1 10
10 1 8 0 9 0 11 1 10
DE
BC 00 01 11 10
00 0 16 0 17 0 19 1 18
DE
BC 00 01 11 10
00 0 16 0 17 0 19 1 18
DE
BC 00 01 11 10
00 0 16 0 17 0 19 1 18
01 1 20 1 21 1 23 0 22
01 1 20 1 21 1 23 0 22
01 1 20 1 21 1 23 0 22
11 1 28 1 29 1 31 0 30
10 0 24 0 25 0 27 0 26
A=1
11 1 28 1 29 1 31 0 30
10 0 24 0 25 0 27 0 26
A=1
11 1 28 1 29 1 31 0 30
10 0 24 0 25 0 27 0 26
F(A,B,C,D,E) = CE + A’BC’E’ + ACD’ + B’C’DE’
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
14
From K-Map to Max-Terms and Min-Terms
2016/5/26
Jackie NTU
Kan - 2007
([email protected]/[email protected])
DSD
(Digital System Design) 2007
http://linton.1d24h.com/~jackiekan/
15
Using K-Map Find Min-term and Max-term
We have been using K-maps to find the minimum sum-of-products form of
a function
(___)+(__)+(___)
minterm + minterm + minterm
You can also use K-maps to find the minimum product-of-sums form of a
function
(_+_+_)(_)(_+_)
maxterm * maxterm * maxterm
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
16
Min-term and Max-term from K-Map
BC
A 00 01 11 10
0 0 0 11 33 22
1 44 55 77 66
Min-Term
A'B'C'
A'B'C
A'BC'
A'BC
AB'C'
AB'C
ABC'
ABC
2016/5/26
Min-Term
m0
m1
m2
m3
m4
m5
m6
m7
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
Max-Term
M0
M1
M2
M3
M4
M5
M6
M7
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
Max-Term
A+B+C
A+B+C'
A+B'+C
A+B'+C'
A'+B+C
A'+B+C'
A'+B'+C
A'+B'+C'
17
Finding POS/和項積 & SOP/積項和Form from K-Map
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
01 0 4 0 5 X 7 0 6
11 1 12 0 13 X 15 X 14
10 1 8 1 9 X 11 X 10
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
01 0 4 0 5 X 7 0 6
11 1 12 0 13 X 15 X 14
10 1 8 1 9 X 11 X 10
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
CD
AB 00 01 11 10
00 0 0 0 1 X 3 0 2
01 0 4 0 5 X 7 0 6
01 0 4 0 5 X 7 0 6
11 1 12 0 13 X 15 X 14
11 1 12 0 13 X 15 X 14
10 1 8 1 9 X 11 X 10
10 1 8 1 9 X 11 X 10
01 0 4 0 5 X 7 0 6
11 1 12 0 13 X 15 X 14
10 1 8 1 9 X 11 X 10
F(A,B,C,D) = (B'+D') ( A )
F(A,B,C,D) = AD' + AB'
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
18
Quiz 1
Using K-Map method to minimize the following Boolean expressions in SOP
and POS form:
F(X,Y,Z) = Sm(0,2,5,6)
F(X,Y,Z) = PM(1,3,6)
F(W,X,Y,Z) = Sm(0,1,2,3,4,8,9,10,15)
F(V,W,X,Y,Z) = PM(0,3,4,8,9,14,15,18,22,24,26,28)
BC
A 00 01 11 10
0
0
1
3
2
1
CD
AB 00 01 11 10
00
0
1
3
2
01
4
5
7
11
10
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4
5
7
6
12
13
15
14
8
9
11
10
6
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
19
Tabular Minimization Method /
Quine-McCluskey Method (列表法)
2016/5/26
Jackie NTU
Kan - 2007
([email protected]/[email protected])
DSD
(Digital System Design) 2007
http://linton.1d24h.com/~jackiekan/
20
主要方法
產生函數F的SOP 表示式(Sum of Product)
重複運用 XY + XY’ = X 簡化函數
相鄰定理
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
21
Quine-McCluskey Method - An Example
Find all the prime implicants
f (a, b, c, d ) m(0,1,2,5,6,7,8,9,10,14)
2016/5/26
group 0
0 0000
group 1
1 0001
2 0010
8 1000
group 2
5
6
9
10
group 3
7 0111
14 1110
0101
0110
1001
1010
Group the min-terms
according to the number
of 1s in the min-term.
This way we only have to
compare min-terms from
adjacent groups.
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
22
Quine-McCluskey Method - An Example
Column I
2016/5/26
Column II
group 0
0 0000
group 1
1 0001
2 0010
8 1000
group 2
5
6
9
10
group 3
7 0111
14 1110
0101
0110
1001
1010
0,1 0000,2 00-0
0,8 -000
1,5 0-01
1,9 -001
2,6 0-10
2,10 -010
8,9 1008,10 10-0
5,7 01-1
6,7 0116,14 -110
10,14 1-10
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
23
Quine-McCluskey Method - An Example
Grouping
Column I
2016/5/26
Column II
group 0
0 0000
group 1
1 0001
2 0010
8 1000
group 2
5
6
9
10
group 3
7 0111
14 1110
0101
0110
1001
1010
0,1 0000,2 00-0
0,8 -000
1,5 0-01
1,9 -001
2,6 0-10
2,10 -010
8,9 1008,10 10-0
5,7 01-1
6,7 0116,14 -110
10,14 1-10
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
Grouping
24
Quine-McCluskey Method - An Example
Column I
group 0
0 0000
group 1
1 0001
2 0010
8 1000
group 2
5
6
9
10
group 3
7 0111
14 1110
2016/5/26
0101
0110
1001
1010
Column II
0,1 0000,2 00-0
0,8 -000
1,5 0-01
1,9 -001
2,6 0-10
2,10 -010
8,9 1008,10 10-0
5,7 01-1
6,7 0116,14 -110
10,14 1-10
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
Column III
0,1,8,9
0,2,8,10
0,8,1,9
0,8,2,10
2,6,10,14
2,10,6,14
-00-0-0
-00-0-0
--10
--10
25
Quine-McCluskey Method - An Example
Column I
group 0
0 0000
group 1
1 0001
2 0010
8 1000
group 2
5
6
9
10
group 3
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0101
0110
1001
1010
7 0111
14 1110
Column II
0,1 0000,2 00-0
0,8 -000
1,5 0-01
1,9 -001
2,6 0-10
2,10 -010
8,9 1008,10 10-0
5,7 01-1
6,7 0116,14 -110
10,14 1-10
Column III
0,1,8,9
0,2,8,10
0,8,1,9
0,8,2,10
2,6,10,14
2,10,6,14
-00-0-0
-00-0-0
--10
--10
No more combinations
are possible, thus we
stop here.
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
26
Quine-McCluskey Method - An Example
Column I
group 0
0 0000
group 1
1 0001
2 0010
8 1000
group 2
5
6
9
10
group 3
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0101
0110
1001
1010
7 0111
14 1110
Column II
0,1 0000,2 00-0
0,8 -000
1,5 0-01
1,9 -001
2,6 0-10
2,10 -010
8,9 1008,10 10-0
5,7 01-1
6,7 0116,14 -110
10,14 1-10
Column III
0,1,8,9
0,2,8,10
0,8,1,9
0,8,2,10
2,6,10,14
2,10,6,14
-00-0-0
-00-0-0
--10
--10
We can eliminate repeated
combinations
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
27
Quine-McCluskey Method - An Example
Column I
group 0
0 0000
group 1
1 0001
2 0010
8 1000
group 2
5
6
9
10
group 3
7 0111
14 1110
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0101
0110
1001
1010
Column II
Column III
0,1 0000,2 00-0
0,8 -000
1,5 0-01
1,9 -001
2,6 0-10
2,10 -010
8,9 1008,10 10-0
5,7 01-1
6,7 0116,14 -110
10,14 1-10
0,1,8,9 -000,2,8,10 -0-0
2,6,10,14 --10
f = a’c’d
Now we form f with the
terms not checked
f = a’c’d + a’bd
f = a’c’d + a’bd + a’bc
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
28
Quine-McCluskey Method - An Example
Column I
group 0
0 0000
group 1
1 0001
2 0010
8 1000
group 2
5
6
9
10
group 3
7 0111
14 1110
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0101
0110
1001
1010
Column II
Column III
0,1 0000,2 00-0
0,8 -000
1,5 0-01
1,9 -001
2,6 0-10
2,10 -010
8,9 1008,10 10-0
5,7 01-1
6,7 0116,14 -110
10,14 1-10
0,1,8,9 -000,2,8,10 -0-0
2,6,10,14 --10
Now we form f with the
terms not checked
f = a’c’d + a’bd + a’bc
+ b’c’ + b’d’ + cd’
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
29
Quine-McCluskey Method - An Example
But, the form below is not minimized, using a Karnaugh map we can
obtain:
f = a’c’d + a’bd + a’bc + b’c’ + b’d’ + cd’
a
1
1
1
1
1
d
1
c
1
1
1
1
b
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
30
Quine-McCluskey Method - An Example
But, the form below is not minimized, using a Karnaugh map we can
obtain:
f = a’c’d + a’bd + a’bc + b’c’ + b’d’ + cd’
a
F = a’bd + cd’ + b’c’
Thus, we need a method to
eliminate this redundant terms
from the Quine-McCluskey
solution.
2016/5/26
1
1
1
1
1
d
1
c
1
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
1
1
1
b
31
Quine-McCluskey Method - An Example
0 1 2 5 6 7 8 9 10 14
X X
(0,1,8,9)
b’c’ X X
X
X
X
(0,2,8,10) b’d’ X
X
X
X X
(2,6,10,14) cd’
X
X
(1,5)
a’c’d
X
X
(5,7)
a’bd
X X
(6,7)
a’bc
Question:
Given the prime implicant chart above, how can we identify the essential
prime implicants of the function?
2016/5/26
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32
Quine-McCluskey Method - An Example
0 1 2 5 6 7 8 9 10 14
X X
(0,1,8,9)
b’c’ X X
X
X
X
(0,2,8,10) b’d’ X
X
X
X X
(2,6,10,14) cd’
X
X
(1,5)
a’c’d
X
X
(5,7)
a’bd
X X
(6,7)
a’bc
Step 1:
Find the independent terms
2016/5/26
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33
Quine-McCluskey Method - An Example
0 1 2 5 6 7 8 9 10 14
X X
(0,1,8,9)
b’c’ X X
X
X
X
(0,2,8,10) b’d’ X
X
X
X X
(2,6,10,14) cd’
X
X
(1,5)
a’c’d
X
X
(5,7)
a’bd
X X
(6,7)
a’bc
Once a term is included in the solution, all the minterms covered by that
term are covered.
Therefore we may now mark the covered minterms and find terms that
are no longer useful.
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
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34
Quine-McCluskey Method - An Example
0 1 2 5 6 7 8 9 10 14
X X
(0,1,8,9)
b’c’ X X
X
X
X
(0,2,8,10) b’d’ X
X
X
X X
(2,6,10,14) cd’
X
X
(1,5)
a’c’d
X
X
(5,7)
a’bd
X X
(6,7)
a’bc
As we have not covered all the minterms with essential prime implicants,
we must choose enough non-essential prime implicants to cover the
remaining minterms.
We choose first prime implicants that cover the most minterms.
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
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35
Quine-McCluskey Method - An Example
0 1 2 5 6 7 8 9 10 14
X X
(0,1,8,9)
b’c’ X X
X
X
X
(0,2,8,10) b’d’ X
X
X
X X
(2,6,10,14) cd’
X
X
(1,5)
a’c’d
X
X
(5,7)
a’bd
X X
(6,7)
a’bc
Therefore our minimum solution is:
f(a,b,c,d) = b’c’ + cd’ + a’bd
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
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36
Glitch and Hazard
[email protected]
2016/5/26
Jackie NTU
Kan - 2007
([email protected]/[email protected])
DSD
(Digital System Design) 2007
http://linton.1d24h.com/~jackiekan/
37
Simulation Results of Example Circuit
U1 NOT
A
2
U2 NOT
1
W1
2
U3 NOT
1
W2
2
1
W3
U4 A ND2
2
Y
1
3
Not Always Low
2016/5/26
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38
Kinds of Hazards
1
1
0
Static
1-hazard
Input change causes output to go from 1 to 0 to 1
Static
0-hazard
Input change causes output to go from 0 to 1 to 0
1
0
0
1
0
0
1
Dynamic
1 hazards
0
2016/5/26
1
Input change causes a double change
from 0 to 1 to 0 to 1 OR
from 1 to 0 to 1 to 0
0
Jackie Kan - 2007 ([email protected]/[email protected])
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39
Verilog Code for The Example
module f1(a,b,c,d,y);
input a,b,c,d;
output y;
wire w1,w2,w3,w4,w5,w6;
or #10 or1(w1,a,b);
not #5 not1(w2,b);
not #5 not2(w3,a);
or #20 or2(w4,c,w2);
and #5 and1(w5,w1,w4);
and #5 and2(w6,w2,w3,d);
or #5 or3(y,w5,w6);
endmodule
module test1;
reg w,x,y,z;
wire f;
f1 ff1(w,x,y,z,f);
initial begin
w=0; x=0; y=0; z=0;
#100 z=1;
#100 x=1;
end
endmodule
U1 O R2
W
2
X
3
1
W1
Y
U5 A ND2
U2 O R2
U3 NOT
2
2
2
1
W2
1
W4
1
3
3
U4 NOT
2
U7 O R2
W5
2
W6
3
1
F
U6 A ND3
1
W3
2
3
4
1
Z
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
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40
Simulation Result
Dynamic Hazard
U1 OR2
W
2
X
3
10
1
W1
Y
U5 AND2
U2 OR2
U3 NOT
2
5
2
1
W2
1
W3
3
20
2
1
W4
3
U4 NOT
2
5
5
1
U7 OR2
W5
2
W6
3
5
1
F
U6 AND3
2
3
4
5
1
Z
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
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41
Static1-Hazard (Also called SOP hazard)
AB
C 00
01
11
10
0
0
1
0
0
1
0
0
1
3
1
4
2
1
5
X = A' B + A C
1
7
6
U4 NOT
A
2
1
n1
U1 A ND2
2
1
n2
3
U3 OR2
B
2
1
U2 A ND2
2
C
2016/5/26
X
3
1
n3
3
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42
Static 1-Hazard
Consider ABC change from 111 to 011
U4 NOT
A
2
1
n1
U1 A ND2
2
1
n2
3
U3 OR2
B
2
1
U2 A ND2
2
1
C
X
3
n3
3
A
A’
n1
A’B
n2
AC
n3
A and A’ are 0
at the same time
X
2016/5/26
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43
Solution for Eliminate the Static1-Hazard
Coupled terms = A'B, AC
Residues = B, C
Residues (殘渣) is that part of a coupled term that remains after removing the
coupled variable
Hazard Cover
Independent with coupled variable
X = A' B + A C + B C
U4
A
2
NOT
1
n1
U1 A ND2
2
1
3
B
n2
U2 A ND2
U3 OR3
2
C
1
n3
1
n4
3
2
3
4
1
U2 A ND2
2
3
2016/5/26
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44
X
Static 0-Hazard (Also called POS hazard)
AB
C 00
01
11
10
0
0
1
0
0
1
0
0
1
1
4
3
1
5
X = (A+B)(A’+C)
2
1
7
6
U5 OR2
A
2
1
B
3
U8 A ND2
n2
2
n3
3
X
1
U7 NOT
2
1
n1
U6 OR2
2
1
C
2016/5/26
3
Jackie Kan - 2007 ([email protected]/[email protected])
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45
Static 0-Hazard
Consider ABC change from 000 to 100
U5 OR2
A
2
1
B
3
n2
n3
U8 A ND2
2
1
X
3
U7 NOT
2
1
n1
U6 OR2
2
1
3
C
A
A’
n1
A+B
n2
A’ + C
n3
A and A’ are 1
at the same time
Y
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
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46
Solution for Eliminate the Static 0-Hazard
Coupled terms = A+B, A’+C
Residues = B, C
Residues (殘渣) is that part of a coupled term that remains after removing the
coupled variable
Hazard Cover
Independent with coupled variable
X = (A+B)(A’+C)(B+C)
U5 OR2
A
2
B
3
1
n2
n3
U7 NOT
2
1
n1
U8 AND3
2
3
4
1
U6 OR2
2
1
C
3
U6 OR2
2
1
n4
3
2016/5/26
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47
X
Multiplexer
U23
I0
AND3
2
3
4
1
U24
I1
AND3
2
3
4
1
U21
2
3
1
U25
I2
AND3
2
3
4
2
3
4
1
1
1
0
I0
0
1
I1
1
0
I2
1
1
I3
0
2
3
2
NOT_0
2
0
AND3
U27
NOT_0
Y
OR4
1
U22
B
1
U26
I3
Y
4
5
A
Multiplex Y
S1 S0
S1
Select
S0
2016/5/26
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48
Multi-Bits Multiplexer
U1
A1
AND3
2
3
4
1
U2
A2
AND3
2
3
4
1
U3
OR2
2
1
Y1
A
4 bits
3
U4
A3
4
AND3
2
3
4
1
U5
OR2
Y
2X1
2
U6
A4
AND3
2
3
4
1
Y2
1
Y3
1
Y4
1
U7
OR2
2
U8
B1
AND3
2
3
4
B 4
3
1
U9
E S
OR2
2
U10
B2
AND3
2
3
4
3
1
U11
B3
AND3
2
3
4
1
U12
B4
2
3
4
U13
S(Select)
2
E(Enable)
2
NOT_0
1
U14
2
AND3
1
E
S
Y
(Enable)
(Select)
1
X
All 0
0
0
A
0
1
B
NOT_0
1
U15 NOT_0
1
2016/5/26
4
MUX
3
Jackie Kan - 2007 ([email protected]/[email protected])
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49
Demultiplexer
Demultiplexer(解多工器)
可將單一輸入信號傳送至多個可能的輸出線上
m個Control Signal
…
1個
Input Signal
2016/5/26
Demultiplexer
(解多工器)
…
Jackie Kan - 2007 ([email protected]/[email protected])
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n個Output
Signal
50
S0
U12
NOT_0
1
1
U11
NOT_0
U6
D
S0
0
0
1
1
2
2
S1
Demultiplexer
AND3
2
3
4
U7
1
Y0
1
Y1
S1
0
1
0
1
Y0
D
0
0
0
Y1
0
D
0
0
AND3
2
3
4
0
1
D
U9
1
Y2
3
S1 S0
U10
2016/5/26
DeMultiplex2
AND3
2
3
4
2
3
4
Y2
0
0
D
0
AND3
1
Y3
Jackie Kan - 2007 ([email protected]/[email protected])
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Select
51
Y3
0
0
0
D
Decoder
Decoder(解碼器)與Demultiplexer(解多工器)差別在於沒有輸入資料端，唯
一的輸入是控制位元
m個Control Signal
m個Control Signal
…
1個
Input Signal
2016/5/26
Demultiplexer
(解多工器) …
…
n個Output
Signal
Decoder
(解碼器)
Jackie Kan - 2007 ([email protected]/[email protected])
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…
n個Output
Signal
52
4-to-16 Decoder
4-of-16 decoder(4對16解碼器)
又稱為
binary-to-decimal decoder
(二進位對十進位解碼器)
ABCD=0001
Y1=H
Others=L
ABCD=0100
Y4=H
Others=L
2016/5/26
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53
Encoder
編碼器(encoder)將一條動作的輸入信號轉換成編碼後的輸出信號
m個input signal
…
Encoder
(編碼器)
2016/5/26
…
n個Output
Signal
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54
十進位BCD編碼器
若按下5 ABCD=0101
2016/5/26
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55
ROM
唯讀記憶體(read-only memory, ROM)
能儲存許多二進位數字，以便代表電腦指令與固定資料
此外，亦可取代布林代數函數所導出的SOP(積項和)電路
二極體ROM
利用位址定出資料儲存處
Address
0
1
2
3
4
5
6
7
2016/5/26
Data
0111
1000
1011
1100
0110
1001
0011
1110
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56
Logic Functions Made By ROM
ROM可以取代AND-OR電路產生相同的真值表
Y3 ABC ABC ABC ABC ABC
Y2 ABC ABC ABC ABC
Y1 ABC ABC ABC ABC ABC
Y0 ABC ABC ABC ABC
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57
On-Chip Decoding
晶片上解碼(on-chip
decoding)可應用於記憶體位
址選擇開關。
例：3對8解碼器
ABC=100
Y3Y2Y1Y0=0110
ABC=110
Y3Y2Y1Y0=0011
n條位址線有2n個記憶位址
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58
Mask ROM
二進位數字有時被稱為一個字(word)。二進位數字或字在電腦中可用來表示
指令、字母、十進位數字等訊息。
圖為一個32位元的ROM，即由8個4位元的字構成，也可用8X4 ROM表示。
常用商用TTL ROM：
7488 IC：32X8 256位元ROM
74187 IC：256X4 1024位元ROM
74S370 IC：512X4 2048位元ROM
商業上大量生產時，以罩幕(mask)方式
建立所欲儲存的資料
2016/5/26
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59
PROM - Programmable ROM
可程式規劃的ROM (programmable
ROM, PROM)允許使用者儲存自己想
要的資料
PROM規劃器利用燒入(burning in)
方式儲存資料。利用此方式將資料
燒入後將無法再更改
商用PROM適合在ROM需要量不大時
其缺點是會限制輸入變數的數目
X代表可熔性的保險絲(fusible link)，
必要時可移除
PROM中，AND閘陣列是不可程式規
劃的，而OR閘陣列則可
2016/5/26
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60
PROM - Programmable ROM
應用至布林函數輸出
Y0 ABC
Y1 A B A BC A BC
Y2 A
Y3 A B
可抹除的PROM（EPROM）
在資料規劃後可用紫外光照射抹除，
重新規劃。應用於常做修正的產品
開發階段，等設計完成後再以PROM
或ROM的方式大量生產。
2016/5/26
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61
PAL - Programmable Array Logic
PAL (Programmable Array Logic)可
程式規劃的陣列邏輯閘存在於單晶
片上，是邏輯設計的另一種方法
PAL有一個可程式規劃的AND閘陣列
和一個固定的OR陣列
利用PROM規劃器，燒入所需標準積
項，然後至被固定的輸出端OR起來
Y3 ABCD ABC D ABCD ABC D
Y2 ABC D ABCD ABCD
Y1 ABC ABC ABC ABC
Y0 ABCD
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62
Programmable Logic Devices
PLA (Programmable Logic Array)
可程式規劃的邏輯陣列，可規劃輸
入的AND陣列及輸出的OR陣列。
PROM、PAL、PLA均屬可程式規劃
邏輯裝置(Programmable Logic
Device, PLD)。
2016/5/26
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63
PLA - Programmable Logic Array
2016/5/26
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64
CPLD - Complex PLD
CPLD是較複雜的邏輯元件，它整合了更多的PLD邏輯方塊及相互關係連線架
構
晶片內含多個類似PAL的方塊及可程式化之繞線
2016/5/26
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65
Summery
PLA (Programmable Logic Array)
被認為是最早的PLD，以AND-OR陣列結構所組成，但AND部份與OR部份都可以
進行組態規劃
PAL (Programmable Array Logic)
與PLA相較，PAL僅允許規劃AND部份，OR部份則已事先固定，不允許再行組態
為了與PLA有所區別，故意將縮寫字詞的最後兩字母調換，稱為PAL
GAL (Generic Array Logic)
整體規劃與組態特性大致與PAL相同，但由於改採行EEPROM的可電氣抹除技術，
不似PAL 是用Fuse/PROM或OTP（One-Time-Programmable）型態的EPROM等
技術
PAL僅允許進行一次組態規劃（亦稱：程式燒 錄，由於Fuse是類似保險絲的熔
絲，以較高電能燒斷熔絲便可產生開路性的矩陣，反之則為短路、閉路，以此
來實現斷連組態）
GAL則允許多次組態
2016/5/26
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66
Summery
PEEL (Programmable Electrically Erasable Logic)
整體特性與GAL相同，但更加保證可重複程式化（斷連組態重新規劃、重新燒寫
邏輯程式）的次數（如1,000次以上），及程式化完畢後的組態保持年限（如10
年以上），此主要是EEPROM技術更加精進的結果
EPLD (Electronic Programmable Logic Device)
由於PLD從過去的Fuse單次燒斷規劃到之後用電氣方式重新抹除、多次規劃，因
此為了與過去僅能單次規劃的PLD有所區別，可用電氣方式重新抹寫的PLD就稱
為EPLD
CPLD (Complex Programmable Logic Device)
之前的PLD，其內部可供規劃的邏輯閘數目並不多，外部接腳數也很有限
半導體密度製程的飛躍精進，能在單顆晶片內裝入極多的可程式邏輯閘，在輸
出入接腳上也有大幅提升
為了與過去只能在稀少電路（邏輯閘）資源上進行簡易規劃的PLD有所區別，可
規劃資源更充沛的 PLD就被稱為複雜的PLD：CPLD
SPLD (Simple Programmable Logic Device)
過去的種種簡易規劃型PLD就被稱為簡單的PLD：SPLD，或是可規劃資源較少的
Small PLD，縮寫一樣是SPLD
2016/5/26
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67
Summary
FPGA (Field Programmable Gate Array)
在GAL上已經於輸出接腳位置使用簡易的序向邏輯電路，而前述的各類PLD都以
組合邏輯的組態規劃為主
Xilinx推出以序向邏輯為主規劃的PLD，同時也含有充沛的可規劃資源，但為了
與CPLD有所區別，故稱FPGA
FPGA亦有業者特有行銷的含意，且CPLD與FPGA間不易清楚分界（此類似於
SPLD與CPLD間，完全是以整合資源多寡的感受來區別），全然取決於組合邏輯
規劃多或序向邏輯規劃多來看待
今日也愈來愈多PLD取兩者之長而造就複合型態的PLD，如此既可認定為CPLD，
也可認定為FPGA
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
68
Quiz 2
Please implement these functions using PROM & PAL
Y3 ABCD ABC D ABCD ABC D
Y2 ABC D ABCD ABCD
Y1 ABC ABC ABC ABC
Y0 ABCD
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
69
Tri-State of Logic Device
2016/5/26
Jackie NTU
Kan - 2007
([email protected]/[email protected])
DSD
(Digital System Design) 2007
http://linton.1d24h.com/~jackiekan/
70
Buses
Concept is to link together multiple functional units over a common data
highway at a lower cost than using multiple point to point links
E
E
A
A
D
P bus
B
C
D
OR
B
C
Q bus
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
71
Bus - Essential Part of Any Computer
CPU
Primary
Memory
Secondary
Memory
I/O
Data Bus
Address Bus
Control Bus
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
72
Logic State
What is the logic state at point A?
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
73
Tri-state Logic Outputs
Since we can have multiple masters on a bus, we need Tri-state logic for
attachment to a bus so that each device can choose to drive or not drive
the bus depending on whether it is the bus master for a given bus cycle
Tri-state logic outputs prevent bus conflicts
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
74
TTL Output Stage
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
75
Tri-State Bus
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
76
Tri-State Buffer in Verilog
module tri_buf_using_assign (x, oe);
reg x, oe;
wire pad;
assign pad = (oe) ? x : 1'bz;
endmodule;
oe
x
2016/5/26
y
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
77
Tri-State Buffer in VHDL
ENTITY Buffer_Tri_State IS
PORT(x:
IN
std_logic;
y:
OUT
std_logic;
oe:
IN
std_logic
); END;
ARCHITECTURE Buffer3 OF Buffer_Tri_State IS
BEGIN
WITH oe SELECT
y <= x WHEN ‘1’,
-- Enabled: y <= x;
‘Z’ WHEN ‘0’;
-- Disabled: output a tri-state
END;
oe
x
2016/5/26
y
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
78
Memory Element
U12
DATA
NAND2
U14
2
NAND2
2
1
3
2
U16 NOT_0
1
U13
NAND2
U15
2
2016/5/26
3
Q
1
/Q
3
NAND2
2
1
CLK
1
3
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
79
Memory Cell Circuit - Using Tri-State Buffer Make I/O Line
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
80
16 x 1 Bit Memory
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
81
Micron - NOR Type Flash Memory - MT28F008B
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
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82
Quiz 3
Please use K-map to design a 2-digits adder in base 2 input controlled by
normal open dip switch, base 8 output and display on two 7-segment LED.
For the 7-segment, MSD is common anode (共陽極), LSD is common
cathode (共陰極).
Please using two-level ALL-NAND gates design the MSD digit and using
two-level ALL-NOR gates design the LSD.
You have only one maximum 4-bits adder resource
The LED display shows MSD or LSD digit controlled by a normal open key
switch. The MSD lights on key not pressed and the LSD lights on key have
pressed. When one digit shows the result, the other one digits do not
allowed shows anything and it should be turn off.
Do not allowed using ROM to implement this circuit.
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
http://linton.1d24h.com/~jackiekan/
83
Quiz 3
g
f
10 9
VCC*2 a
b
8
6
7
a
f
b
g
c
e
dot
d
0
8
1
2
3
e
d VCC*1 c
1
9
2016/5/26
4
2
10
5
dot
3
11
4
12
5
13
6
14
7
15
Used Font
in 7-Segment LED
Jackie Kan - 2007 ([email protected]/[email protected])
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84
Quiz 3
Input A
Base-8, MSD
Display
Circuit
(ALL NAND)
+5V
Base-2
Base-2
To
Adder Base-8
Circuit
Input B
2016/5/26
Base-8, LSD
Display
Circuit
(ALL NOR)
Jackie Kan - 2007 ([email protected]/[email protected])
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Gnd
85
Quiz 3
Input A
Carry
Look
Ahead
Base-2
To
Base-8
Circuit
+5V
Buffer Control
Input B
Max
4-Bits
Base-2
Adder
DMUX
MUX
Base-8, MSD
Display
Circuit
(ALL NAND)
Base-8, LSD
Display
Circuit
(ALL NOR)
Gnd
Digit Select
2016/5/26
Jackie Kan - 2007 ([email protected]/[email protected])
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86