Transcript Chapter 4 Processor Technology and Architecture

Chapter 4
Processor Technology and Architecture
Chapter goals
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Describe CPU instruction and execution cycles
Explain how primitive CPU instructions are combined to form
complex processing operations
Describe the key CPU design features, including instruction
format, word size, and clock rate
Describe the function of general-purpose and special-purpose
registers
Compare and contrast CISC and RISC CPUs
Describe the principles and limitations of semiconductor-based
microprocessors
Model of Central Processing Unit
How the CPU works
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CPU is a complex electronic device that
carries out instructions
Called the “brains” of a computer
Is a combination of parts that through a
carefully coordinated process execute code
CPU parts
Control Unit – moves data and instructions between
main memory and registers
Arithmetic and Logic Unit – performs all computation
and comparison operations
Registers – fixed size high speed storage locations
that hold inputs and outputs for the ALU
How does CPU execute code?
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CPU can only execute machine code
Machine code is a predetermined set
(defined by hardware manufacturer) of
instructions CPU can execute
Machine code is in binary format (0s and 1s)
Process of executing code is called the
“Fetch Execute Cycle”
The Fetch Execute Cycle
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Program counter (pc) points to the next instruction to
be execute
Instruction is loaded into instruction register and
program counter is incremented
Instruction is de-coded or separated into OPCODE
and addresses
Instruction is executed and results are stored if
required
CPU Fetch Execute Cycle
CPU Instructions
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Instruction is a single command a CPU is
capable of carrying out
Instruction is formatted as a bit string, i.e. a
sequence of 0s and 1s
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Opcode – unique binary number representing
operation to be performed
Operand(s) – reference or pointer to data needed
for operation
Instruction format
Opcodes and operands
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Opcodes – unique binary number
representing an operation to be carried out
Operand(s) – reference(s) to location of data
needed for operation
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Register #
Memory address
Secondary storage or I/O device
How is instruction executed?
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Instruction directs CPU to route data through a builtin set of circuitry (i.e. a series of logic gates)
designed to carry out the desired function
Circuitry takes input signals and depending on
sequence and number of logic gates produces the
desired output signal
Output signal is stored in a register
Then may be stored in memory, secondary storage,
or used by a subsequent instruction
Instructions
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Some instructions are just handled by the
control unit
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Moving or copying data
Halting or restarting the CPU
Other instructions require coordination with
the ALU
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Computation
Logic (comparisons)
Instruction set
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The collection of all possible instructions CPU
can execute is called the “instruction set”
Predetermined by hardware manufacturer
Vary greatly from machine to machine (even
with the same manufacturer)
Instruction set cont.
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Since instruction sets vary so much, we will
describe what is generally in most machines
Specific “machine code” we will learn will be
for the machine simulator presentation
General instruction categories
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Data movement (really a copy command,
original bit pattern is unchanged)
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Load – copies data from memory into a register
Store – copies data from a register into memory
Data Transformation
Logical shift
Using logical shift
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Computers often use Boolean (true false)
values to control processes
These values (called flags) can be stored in a
single bit
Therefore, a 32 bit register can contain 32
individual flags to identify 32 separate
conditions
Program status word (PSW)
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See p. 133 in text
PSW used by CPU to store status information
for currently executing instruction
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Store the result of a comparison (equal or not
equal, T or F)
Indicate overflow and underflow conditions
How a PSW is used
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http://www.heyrick.co.uk/assembler/psr.html
This is an example of how the PSW is used
for a processor manufactured by ARM, a
processor manufacturer in Australia
http://www.arm.com/
Arithmetic shift
Sequence control
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Default sequence (order) of program instructions is
one after another
Can override through BRANCH or JUMP
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unconditional – new address of next instruction is loaded
into PC (JUMP)
conditional – new address of instruction is loaded
depending on result of some comparison (BRC & BRP in
simple machine)
HALT – ends execution
Sequence control cont.
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Allows loops (iteration)
for (int 1=0; i <10; i++)
cout << “\nHello”;
Allows decision statements
if (speed >= 65)
cout << “Speeding ticket”;
else
cout << “Legal speed”;
Variations in instruction format
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Formats can vary as to opcode size
meaning of opcode values
Number of operands
Data types used as operands
Length and coding format of each operand
Reduced Instruction Set Computing
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Analysis of actual software found that certain
instructions made up the vast majority of
machine code
Many instructions used very infrequently
CPU design that limited instruction set found
to be much faster
RISC vs. CISC
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Pentium (RISC) vs. 486 (CISC)
CISC bloated instruction set slowed down
execution time
CISC CPU larger and slower than necessary
Clock rate
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System clock is a timing device that
generates timing pulses or signals that are
transmitted devices throughout the computer
Frequency or rate (clock rate) is measured in
hertz (Hz) and megahertz (MHz)
Clock rate cont.
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CPU uses timing of clock to trigger its actions
(i.e. fetch, execute, store)
Clock is also used by other devices like
secondary storage
CPU must often wait for slower devices
(secondary storage, RAM)
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Wait state – cycle where CPU is idle waiting for
other devices
Measuring CPU speed
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Clock rate – measured in mHtz
MIPS – millions of instructions per second
(assumed to be instructions involving integer
operations)
MFLOPS – millions of floating point
operations per second
CPU instructions can vary greatly as to length
of time for execution
CPU registers
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General purpose
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Collection of registers that can be used to store
intermediate input and output of ALU operations
Example
34 + 31 + 44
first 34 is added to 31 and placed in a register,
then 44 is added to the register
Special purpose registers
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Several registers in CPU are set aside for
specific purposes:
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Instruction register – holds the currently executing
instruction
Program counter (PC) – points to the next
instruction to be executed
Program status word (PSW) – set of flags (bits)
indicating certain conditions
Word size
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Unit of data that contains a fixed number of
bits
Determines the amount of data CPU can
process at one time
Corresponds to size of general purpose
registers
Optimal word size
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Should be same size as system bus
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If bus is smaller every load and store operation
requires multiple transfers
Word size should correspond to size of data
used in the machine
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Int float data types are 4 bytes (32 bits)
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Double is 8 bytes (64 bits)
Current word sizes
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Most desktop machines are 32 bit word size
Doubling word size to 64 increases CPU
components by 2.5 to 3 times
Larger word increases CPU fabrication cost
Since the rest of the machine operates at 32 bit
(system bus and secondary storage) this larger word
size is not yet an advantage
Enhancing Processor Performance
Memory caching (See Chapter 5.)
Pipelining
Method of organizing CPU
circuitry to enable multiple
instructions to execute
simultaneously in different
stages
Ensure pipeline is kept full while
executing conditional branch
instructions
Branch
prediction and
speculative
execution
Multiprocessing Duplicate CPUs or processor
stages execute in parallel
Range of Possible Approaches for
Multiprocessing
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Duplicate circuitry for some or all processing
stages within a single CPU
Duplicate CPUs implemented as separate
microprocessors sharing main memory and a
single system bus
Duplicate CPUs on a single microprocessor
that also contains main memory caches and
a special bus to interconnect the CPUs
The physical CPU
Gate design for addition
Chapter summary
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The CPU continuously alternates between the
instruction, or fetch cycle and execution cycle
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Primitive CPU instructions can be classified into
three types:
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Data movement
Data transformation
Sequence control
Summary cont.
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An instruction formation is a template describing the
op code position and the length and the position,
type and length of each operand
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The CPU clock rate is the number of instruction and
execution cycles potentially available in a fixed time
interval
Summary cont.
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CPU registers are of two types:
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General purpose
Special purpose
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Word size is the number of bits that a CPU can
process simultaneously
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CPUs are electrical devices implemented as siliconbased microprocessors