Transcript Scalable Hierarchical Yield Control System For Semiconductor Manufacturing A Feasibility Study

Scalable Hierarchical Yield Control System
For Semiconductor Manufacturing
A Feasibility Study
Bill Martin, Jill Card, Wai Chan,
Joyce Hyde, Yi-Min Lai
IBEX Process Technology
A Division of Neumath, Inc., Haverhill, MA
John Doxsey, Paul Fearon
National Semiconductor, S. Portland ME
Outline
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Overview
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Design Approach
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Feasibility Study Data Collection
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Feasibility Study Results
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Conclusions/Next Steps
Overview
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Adaptive Hierarchical Design
Works in conjunction with local tool controllers
such as Neumath's Dynamic Neural Controller
(DNC) product.
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Optimises overall yield and end-of-line
performance characteristics
Works with partial data to permit adaptive
adjustment of downstream operation
quality targets to minimize scrap
Yield Controller Hierarchical
Design
Optimize Metrology Targets across Products and Process Steps
X
X
DNC
Deposition
Dep
Quality
Metrics
DNC
CMP
CMP
Quality
Metrics
DNC
Photo
Photo
Quality
Metrics
DNC
Etch
Etch
Quality
Metrics
Y
I
E
L
D
C
O
N
T
R
O
L
L
E
R
Comprehensive Software Tool
Development
• Yield Control Layer
– Accurate prediction of End Of Line (EOL)
metrics
– Automatic metrology target and spec adjustment
• Tool Control Layer
– Accurate prediction of post-process metrology
and action advisory (DNCs, DNCe)
– Automated recipe parameter target and spec
adjustment
Additional Benefits
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Full use of all in-situ and ex-situ sensors across
products.
Automatic optimization of recipe parameters and
metrology specifications. No setup required.
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Determination of quantified sensor importance
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Pinpointing troubled tools
Quantified impact on EOL metrics and Yield
W2W Detection, Diagnosis, and Fix.
Feasibility Study
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Goal: demonstrate that accurate predictive
models can be built
Using step-wise quality measurements as input
Predict end-of-line electrical parameters plus
final product yield
Uses Neural Network-based predictive engine
Adaptive
Flexible
Accurate
Feasibility Study Data Collection
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National Semiconductor, South Portland, ME
0.18μm CMOS technology
Covering 2 different product designs
Data from 381 wafers, 33 lots
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Data Collected:
Quality measurements from CMP, Photo, Etch
All metal layers (31 operations in total)
15 End of Line electrical parameters
Final Yield (% good die)
End of Line Parameters Modelled
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Metal 1,2,3 Bridging
N-Type Silicide Bridging
P-Type Silicide Bridging
Via 1,2,3 Contact Resistance
Metal 1,2,3,4 Continuity Resistance
Poly Continuity Resistance
Product Yield
Measurements Used As
Model Inputs
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Metal layers
Photoresist top and bottom CD
Post-etch top and bottom CD
Defect density
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Dielectric layers
Pre and post CMP thickness and non-uniformity
Pre and post CMP ILD thickness
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Via Layers
Photoresist bottom CD (dense and isolated
structures)
Post-etch bottom CD (dense and isolated
structures)
Data Preparation I
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Quality metrics measured on a sample basis
after each processing step.
Not always on the same wafers within the lot
Results is a sparse data set, insufficient for
model training.
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Algorithm to supply estimates for the missing
measurements:
Use lot-based average if available.
Use time-based moving average otherwise.
Data Preparation II
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Merge quality metric data from all processing
steps with the end-of-line electrical
parameters and final yield
Using lot number and wafer identifier
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Divide data into two subsets
Training data (70% of total)
Divided into Train and Test
Validation data (remaining 30%)
Never used during Neural Network training
Helps avoid over-fitting
Neural Model Training
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Use one Neural Network each for:
End of Line electrical parameters
Final Yield
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Minimal Network acceptance criteria:
Root Mean Square Error (RMSE) must be less
than standard deviation of the observed data
Better than “guessing the mean”
Model must generalize:
RMSE (validation data) < (1+α) RMSE (training data)
Acceptable accuracy measure.
NeuMath Accuracy Measure
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Each EOL parameter assigned a target and
limits in accordance with product
specification.
Divide limits range into 7 regions
Accuracy defined as the fraction of time the
observed and predicted fall into the same subregion.
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Since accuracy is tied to the spec limits:
Remains consistent with current decision-making
criteria
The fraction of time the decision would be the
same using the prediction as it would be using
the observed value.
Results Overview
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Models for 14 of the 16 End Of Line
measurements converged :
Including final yield.
Provide an average accuracy of 90%!!
Comparison of RMS Errors of validation and
training sets shows very good model
generalization.
Critical for model-based decision-making.
Predictive Model Performance
Metal 1 Bridging
Prediction Performance for Metal 1
Continuity Resistance
Prediction Performance for Via 1
Contact Resistance
Prediction Performance for Poly
Continuity Resistance
Prediction Performance for N-Type
Silicide Bridging
Prediction Performance for P-Type
Silicide Bridging
Predictive Model Performance for
Product Yield
Overall Yield
Optimization Results Summary
Recommended
Relative
Overall
Change to
Relative Risk
Target
Improvement
Metrology Measurement
Recipe
Dielectric 3, Pre-CMP - Post-CMP Thickness
Recipe 1
Recipe 2
2.90%
1.80%
2.80%
11.90%
Dielectric 2, 5-site Mean Post-CMP Thickness
Recipe 3
3.00%
22.60%
Dielectric 2, Pre-CMP - Post-CMP Thickness
Recipe 3
Recipe 1
4.10%
3.20%
3.70%
5.50%
Top Dielectric, Pre-CMP - Post-CMP Thickness
Recipe 4
2.40%
2.40%
M2 Photoresist, Bottom CD, Dense structure
Recipe 5
2.20%
7.20%
Dielectric 3, 5-site Mean Post-CMP Thickness
Recipe 2
3.60%
8.60%
Top Dielectric ILD Post-CMP Thickness
Recipe 6
2.00%
0.30%
Dielectric 3 ILD Post-CMP Thickness
Recipe 7
2.60%
2.70%
Top Dielectric, 5-site Mean Post-CMP Thickness
Recipe 4
Recipe 8
2.80%
1.90%
6.50%
5.10%
Conclusions / Next Steps
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Feasibility study a success
Excellent Model performance (90% accuracy)
Optimization shows possible EOL improvements
of up to 22%
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Next Steps
Repeat on additional data sets from our partner
and additional partners
Full beta trial early 2005
Software product release Q2 2005