Modem Design, Implementation, and Testing Using NI’s LabVIEW Prof. Brian L. Evans
Download
Report
Transcript Modem Design, Implementation, and Testing Using NI’s LabVIEW Prof. Brian L. Evans
Modem Design, Implementation,
and Testing Using NI’s LabVIEW
http://www.wncg.org
http://www.ece.utexas.edu
Prof. Brian L. Evans
Embedded Signal Processing Laboratory
The University of Texas at Austin
[email protected]
Contributions by Vishal Monga, Zukang Shen, Ahmet Toker, and Ian Wong, UT Austin
Outline
Real-Time DSP Course
Single Carrier Transceiver
Sinusoidal Generation
Digital Filters
Data Scramblers
Pulse Amplitude Modulation
Quadrature Amplitude Modulation
Multicarrier Transceiver
Conclusion
2
Real-Time DSP Course: Overview
Objectives of junior-level class
Over 500
Build intuition for signal processing concepts
served
Translate signal processing concepts into
since 1997
real-time digital communications software
Lecture: breadth (three hours/week)
Digital signal processing algorithms
Digital communication systems
Digital signal processor architectures
Laboratory: depth (three hours/week)
Deliver voiceband modem
“Design is the science of tradeoffs” (Yale Patt)
Test/validate implementation
http://www.ece.utexas.edu/~bevans/courses/realtime/
3
Real-Time DSP Course: Which DSP?
Students are third-year undergraduates
Fixed-point DSPs for high-volume products
Battery-powered: cell phones, digital still cameras …
Wall-powered: ADSL modems, cellular basestations …
Fixed-point issues
Using non-standard C extensions for fractional data
Converting floating-point programs to fixed-point
Manual tracking of binary point prone to error
Floating-point DSPs
Feasibility for fixed-point DSP realization
Shorter prototyping time
Program TI TMS320C67x DSP in C
Code Composer Studio 2.2
4
Real-Time DSP Course: Textbooks
C. R. Johnson, Jr., and W. A.
Sethares, Telecommunication
Breakdown, Prentice Hall, 2004.
Intro to digital communications
and transceiver design
Matlab examples
Rick Johnson Bill Sethares
(Cornell)
(Wisconsin)
S. A. Tretter, Comm. System Design using
DSP Algorithms with Lab Experiments for
the TMS320C6701 & TMS320C6711, 2003.
Assumes DSP theory and algorithms
Assumes access to C6000 reference manuals Steven Tretter
(Maryland)
Errata/code: http://www.ece.umd.edu/~tretter
5
Lab 1. QAM Transmitter Diagram
Lab 4
Rate
Control
LabVIEW demo by Zukang Shen (UT Austin)
Lab 6
QAM
Encoder
Lab 2
Passband
Signal
Lab 3
Tx Filters
6
Lab 1. QAM Transmitter Diagram
LabVIEW
Control
Panel
QAM
Passband
Signal
Eye
Diagram
LabVIEW demo by Zukang Shen (UT Austin)
7
Lab 1. QAM Transmitter Diagram
square root raise cosine, roll-off = 0.75, SNR =
passband signal for 1200 bps mode
raise cosine, roll-off = 1, SNR = 30 dB
passband signal for 2400 bps mode
8
Lab 2. Sine Wave Generation
Aim: Evaluate three ways
to generate sine waves
Function call
Lookup table
Difference equation
Three output methods
Polling data transmit register
Software interrupts
Direct memory access (DMA) transfers
Expected outcomes are to understand
Signal quality vs. implementation complexity tradeoff
C6701 EVM board’s stereo codec operation
Interrupt mechanisms and DMA transfers
9
Lab 2. Sine Wave Generation
Evaluation procedure
Validate sine wave frequency on scope, and test for
various sampling rates (14 sampling rates on board)
Method 1 with interrupt priorities
Method 1 with different DMA initialization(s)
Spring 2004
Fall 2003
HP 60 MHz
C6701
Digital Storage
Oscilloscope
LabVIEW DSP
Test Integration Code Composer
Toolkit 2.0
Studio 2.2
10
Lab 3. Digital Filters
Aim: Evaluate four ways to implement
discrete-time linear time-invariant filters
FIR filter: convolution in C and assembly
IIR Filter: direct form and cascade of biquads, both in C
IIR filter design gotchas: oscillation & instability
In classical designs, poles sensitive to perturbation
Quality factor measures sensitivity of pole pair:
classical
Q
Elliptic analog lowpass IIR filter dp = 0.21 at wp =
20 rad/s and ds = 0.31 at ws = 30 rad/s [Evans 1999]
poles
zeros
Q
poles
zeros
1.7
-5.3533±j16.9547
0.0±j20.2479
0.68
-11.4343±j10.5092
-3.4232±j28.6856
61.0
-0.1636±j19.9899
0.0±j28.0184
10.00
-1.0926±j21.8241
-1.2725±j35.5476
optimized
Q [ ½ , ) where Q = ½ dampens and Q = oscillates
11
Lab 3. Digital Filters
IIR filter design for implementation
Butterworth/Chebyshev filters special
cases of elliptic filters
Minimum order not always most efficient
Filter design gotcha: polynomial inflation
Polynomial deflation (rooting) reliable in floating-point
Polynomial inflation (expansion) may degrade roots
Keep native form computed by filter design algorithm
Expected outcomes are to understand
Speedups from convolution assembly routine vs. C
Quantization effects on filter stability (IIR)
FIR vs. IIR: how to decide which one to use
12
Lab 3. Digital Filters
Test Equipment
Agilent Function Generator
HP 60 MHz Digital Storage Oscilloscope
Spectrum Analyzer
Evaluation Procedure
Sweep filters with sinusoids to construct magnitude and
phase responses
• Manually using test equipment, or
• Automatically by LabVIEW DSP Test Integration Toolkit
Check filter output for cut-off frequency, roll-off factor…
FIR: Compare execution times (in Code Composer) of
• C without compiler optimizations
• C with compiler optimizations
• C callable assembly language routine
IIR: Compute execution times (in Code Composer)
13
Lab 4. Data Scramblers
Aim: Generate pseudo-random bit sequences
Build data scrambler for given connection polynomial
Descramble data via descrambler
Obtain statistics of scrambled binary sequence
Expected outcomes are to understand
Principles of pseudo-noise (PN) sequence generation
Identify applications in communication systems
14
Lab 4. Data Scramblers
Evaluation procedure
Check scrambler output for various deterministic
sequences as input(s)
Descrambler must recover input sequence from
scrambled one
Test for sequence period, autocorrelation and other
significant statistical properties
Using DSP Test & Measurement Toolkit instead
Compute autocorrelation of PN sequence
Compare this autocorrelation with that of white noise
generated by LabVIEW to measue PN sequence quality
15
Lab 5. Digital PAM Transceiver
an
Aim: Develop PAM transceiver blocks in C
Amplitude mapping to PAM levels
Interpolation filter bank for pulse shaping filter
Clock recovery via phase locked loops
L
gT[n]
D/A
3d
d
-d
-3 d
Transmit
Filter
4-PAM
L samples per symbol
gT,0[n]
an
gT,1[n]
D/A
Transmit
Filter
Filter bank implementation
16
Lab 5. Digital PAM Transceiver
Expected Outcomes are to understand
Basics of PAM modulation
Zero inter-symbol interference condition
Clock synchronization issues
Test Equipment: Same as Lab 3
Evaluation Procedure
Generate eye diagram to visualize PAM signal quality
Observe spectrum of modulated signal
Prepare DSP modules to test symbol clock frequency
recovery subsystem
17
Lab 6. Digital QAM Transmitter
Aim: Develop QAM transmitter blocks in C
Differential encoding of digital data
Constellation mapping to QAM levels
Interpolation filter bank for pulse shaping filter
an
1
Serial/
parallel
converter
Bit
stream
J
L
gT[m]
Map to 2-D
constellation
bn
cos(w0 n)
L
+
D/A
gT[m]
L samples per symbol
sin(w0 n)
18
Lab 6. Digital QAM Transmitter
Expected outcomes are to understand
In-phase and quadrature modulation principles
Bandwidth efficiency issues
Test equipment: same as Lab 5
Evaluation procedure
Verify differential encoding and QAM mapping
Generate eye diagram to visualize QAM signal quality
Observe spectrum of modulated signal
19
Lab 7. Digital QAM Receiver – Part 1
Aim: Develop QAM receiver blocks in C
Carrier recovery
Coherent demodulation
Decoding of QAM levels to digital data
Expected outcomes are to understand
Carrier detection and phase adjustment
Design of receive filter
Probability of error analysis to evaluate decoder
Test equipment: Same as Lab 6
Evaluation procedure
Recover and display carrier on scope
Regenerate eye diagram and QAM constellation
Observe signal spectra at each decoding stage
20
Developed Voiceband Transceiver:
Now What? Got Anything Faster?
Multicarrier modulation divides broadband
channel into narrowband subchannels
No inter-symbol interference if constant subchannel
gain and ideal sampling
Based on fast Fourier transform (FFT)
ADSL/VDSL and IEEE 802.11a/g & 802.16a
magnitude
channel
carrier
Each ADSL/VDSL subchannel is 4.3 kHz wide (about a
voice channel) and carries QAM encoded subsymbol
subchannel
frequency
21
Multicarrier Modulation by IFFT
e j 2 f1t
X1
g(t)
g(t)
e
X1
e
+
Discrete
time
X2
e
g(t) : pulse shaping filter
X N /2
j 2
2
n
N
x
j 2 f N / 2 t
x
1
n
N
x
I
j 2 f 2 t
x
g(t)
e
X N /2
Xi
x
e
X2
Q
j 2
j 2
+
N /2
n
N
x
Xi : ith symbol from encoder
22
Multicarrier Modulation (ADSL)
Q
Xi
00101 QAM
Mapping
I
X0
N/2
subchannels
(carriers)
X1
X2
XN/2
Mirror complex
data (in blue) and
take conjugates:
e j e j 2 cos()
XN/2-1*
X2*
N-point
Inverse
Fast
Fourier
Transform
(IFFT)
x0
x1
x2
xN-1
N realvalued
time
samples
forms
ADSL
symbol
X1*
23
Multicarrier Modulation (ADSL)
Inverse FFT
ADSL
CP
N
v samples
CP
downstream upstream
4
32
64
512
N samples
s y m b o l (i)
copy
CP
s y m b o l ( i+1)
copy
CP: Cyclic Prefix
ADSL frame is an ADSL
symbol plus cyclic prefix
D/A + transmit filter
24
Multicarrier Demodulation (ADSL)
S/P
~
X0
N/2
subchannels
(carriers)
~
X N 21
~
XN 2
~*
X N 21
~
X 1*
N-point
Fast
Fourier
Transform
(FFT)
~
x0
~
x1
~
x
2
N time
samples
~
xN 1
25
ADSL Transceiver: Data Xmission
2.208 MHz
N/2 subchannels N real samples
Bits
00110
S/P
quadrature
amplitude
modulation
(QAM)
encoder
TRANSMITTER
N/2 subchannels
QAM
decoder
add
cyclic
prefix
P/S
each block programmed in lab and
covered in one full lecture
each block covered in one full lecture
RECEIVER
P/S
mirror
data
and
N-IFFT
invert
channel
=
frequency
domain
equalizer
P/S parallel-to-serial
D/A +
transmit
filter
channel
N real samples
N-FFT
and
remove
mirrored
data
S/P serial-to-parallel
remove
S/P cyclic
prefix
time
domain
equalizer
(FIR
filter)
receive
filter
+
A/D
FFT fast Fourier transform
26
Telecom and University Tracks
Modem Design, Implementation, and
Testing Using NI’s LabVIEW
Dr. Brian L. Evans
Associate Professor
The University of Texas at Austin
[email protected]
27