Transcript Microcomputer & Interfacing L3 - Electrical and Computer Engineering
Microcomputer & Interfacing Lecture 3
The 8086 Instruction sets
BY: Tsegamlak Terefe
Objective
Introduction Introduction to an instruction Instruction set of 8086 Addressing mode BY: Tsegamlak Terefe
Introduction
Programs in microprocessors are stored in successive memory locations for fetching followed by decoding and execution in general.
There are in general three levels of programming languages. Machine Language Assembly Language High Level Language BY: Tsegamlak Terefe
Introduction
Machine Language These are the binary codes for the instructions you want the microcomputer to execute
11101001000000000101000
It is hard or impossible for a programmer to write code in machine language, because it requires memorizing all the instructions in binary form and soon the programming will Become difficult.
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Introduction
Assembly Language Uses two, three, or four letter
mnemonics
type to represent each instruction The letters in an assembly language mnemonic are usually initials or a short form of the English word(s) for the operation performed by the instruction e.g., SUB for subtract , XOR for Exclusive OR ,ROR for rotate Wright , etc Assembly language program has to be translated to machine language so that it can be loaded into memory and run – This is done by the assembler BY: Tsegamlak Terefe 5
Introduction
High-Level Languages These languages use program statements which are even more English like than those of assembly language e.g. BASIC, C, C++, Java, ... Each high-level statement may represent many machine code instructions An interpreter (compiler) program is used to translate higher-level language statements to machine codes, which can be loaded into memory and executed.
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Instructions
An instruction will have two major parts An opcode and an address/operand to store the result after execution or to operate on respectively.
Opcode : is the operation code which is decoded by the processor to activate the necessary circuitry for the execution of an instruction.
Opcode Address (Operands) BY: Tsegamlak Terefe 7
Instructions
The 8086 microprocessor have variable length instructions ranging from 8 bit to 48 bits.
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Instructions
For Example lets take the following 16 bit instruction 8BEC.
8BEC= 1000 1011 1110 1100 The first six bits will tell us the opcode 1000 10 = MOV The next two bits tell us D= 1 => Data will move to REG from R/M W= 1 => Data is 16 bit in size on the next byte MOD= 11 => data is transferred b/n two registers or R/M is register REG= 10 1 The first register involved is BP R/M= 100 The second register involved is SP Hence the assembly equivalence of this machine code will be MOV BP,SP BY: Tsegamlak Terefe 10
Instructions
Now that we got a grip of what an instruction look like in 8086 we can generalize the instruction sets (opcode) in to six general group. Data transfer instructions Arithmetic instructions Bit manipulation instructions String manipulation instructions Control transfer instructions Processor control instructions BY: Tsegamlak Terefe 11
Instruction Sets
Now that we got a grip of what an instruction look like in 8086 we can generalize the instruction sets (opcode) in to six general group. Data transfer instructions Arithmetic instructions Bit manipulation instructions String manipulation instructions Control transfer instructions Processor control instructions BY: Tsegamlak Terefe 12
Data transfer instructions
Used to transfer data from source operand to destination operand
Memory to register e.g. MOV AX, [0005h] (AX←[0005h]) Register to memory e.g. PUSH AL Immediate to memory/register e.g. MOV AH, 09h I/O device to register e.g. IN AX, 4 Register to I/O device e.g. OUT AL, 2
All the
store, move, load, exchange, input and output
this category
MOV , PUSH
,
POP
instructions belong to ,
XCHG
,
XLAT , IN , OUT , LEA , PUSHF , POPF,LAHF,….
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Arithmetic Instructions
Perform arithmetic operations
Addition e.g.
ADD, ADC, INC, AAA,
Subtraction e.g.
SUB, SBB, DEC, CMP
Multiplication e.g.
MUL, IMUL
Division e.g.
DIV, IDIV
e.g. ADD AL, 5 (AL←AL+5) MUL BL (AX ←AL*BL) MUL BX (DX:AX ←AX*BX) BY: Tsegamlak Terefe 14
Bit Manipulation Instruction
Logical instructions NOT, AND, OR, XOR Shift instructions SHL, SHR, SAL, SAR Rotate instructions ROL, ROR, RCL, RCR RCL RCR CF CF Byte/Word Byte/Word e.g. MOV AL, 1Ch (AL←1Ch (00011100b)) ROR AL, 1 (rotate AL one bit to the right) (AL = 00001110b) BY: Tsegamlak Terefe 15
String Manipulation Instructions
A string is a series of
bytes
or a series of
words
in sequential memory locations. It often consists of ASCII character codes e.g. LODSB – Load byte at DS: [SI] into AL. Update SI STOSW – Store word in AX into ES:[DI]. Update DI CMPSB – Compare bytes: ES:[DI] from DS:[SI] BY: Tsegamlak Terefe 16
Control Transfer Instructions
These instructions are used to tell the processor to start fetching instructions from some new address, rather than continuing in sequence Unconditional transfer instructions e.g. CALL, RET, JMP Conditional transfer instructions e.g. JE, JG, JGE, JL, JLE, JZ Iteration control instructions e.g. LOOP, LOOPE, JCXZ Interrupt instructions e.g. INT, IRET e.g. SUB AX, 32 JZ label … label : MOV BX, 10 AX=AX-32; If(AX==0) } { BX=10; BY: Tsegamlak Terefe 17
Processor Control Instructions
Set/clear flags, control the operation of the processor Flag instructions e.g. STC – set carry flag External hardware synchronization instructions e.g. WAIT - Do nothing until signal on the TEST pin is low No operation instructions e.g. NOP BY: Tsegamlak Terefe 18
Addressing Modes
Addressing mode: Describe the types of operands and the way they are accessed for executing an instruction The operand part of an instructions are accessed from a memory location or a register in various mode of addressing. The 8086 microprocessor have the following addressing modes.
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Addressing Modes
Immediate Direct Register Register Indirect Indexed Register Relative Based Indexed Relative Based Indexed BY: Tsegamlak Terefe 20
Immediate Addressing
Immediate data is a part of instruction, and appears in the form of successive byte(s) e.g. MOV AX, 0005H (AX←0005H) Here, 0005H is the immediate data. The immediate data may be 8-bit or 16-bit in size.
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Direct Addressing
In the direct addressing mode, a 16-bit memory address (offset) is directly specified in the instruction e.g. MOV AX, [5000H ] (AX←[DS:5000H]) Here, data resides in a memory location in the data segment, whose effective address may be computed using 5000H as the offset address and content of DS as segment address.
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Register Addressing
In register addressing mode, the data is stored in a register and it is referred using the particular register All the registers, except IP, may be used in this mode e.g. MOV AX, BX (AX←BX) Here, data is transferred from register BX to register AX BY: Tsegamlak Terefe 23
Register Indirect Addressing
Sometimes, the address of the memory location, which contains data or operand, is determined in an indirect way, using the offset registers The offset address of data is in either BX, SI or DI registers. The default segment is either DS or ES.
e.g. MOV AX, [BX ] (AX←[DS:BX]) Here, data is present in a memory location in DS whose offset address is in BX.
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Indexed Addressing
Offset of the operand is stored in one of the index registers (SI and DI). DS and ES are the default segments for SI and DI respectively This mode is a special case of register indirect addressing mode e.g. MOV AX, [SI ] (AX←[DS:SI]) Here, data is present in a memory location in DS whose offset address is in SI.
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Base Indexed Addressing
The effective address of data is formed by adding content of a base register (BX or BP) to the content of an index register (SI or DI) e.g. MOV AX, [BX ][SI] (AX←[DS:BX+SI]) BY: Tsegamlak Terefe 26
Relative Base Indexed Addressing
The effective address is formed by adding an 8 or 16-bit displacement with the sum of contents of any one of the base registers (BX or BP) and any one of the index registers (SI or DI), in a default segment e.g. MOV AX, 50H[BX ][SI] (AX←[DS:BX+SI+50]) BY: Tsegamlak Terefe 27
Summary of addressing modes
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Next Lecture
Programming the 8086 Emu8086 BY: Tsegamlak Terefe 29
Additional Reference
Dr Manoj’s handout, chapter 2 The Intel Microprocessors, Barry B.
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