ENGG 3640: Microcomputer Interfacing

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Transcript ENGG 3640: Microcomputer Interfacing

ENG3640
Microcomputer Interfacing
Week #2
Assembly Language
Programming
ENG3640 Fall 2012
1
Resources

Huang, Chapter 1, Sections



1.9 68HC12 Addressing Modes
1.11 Sample of HCS12 Instructions
Huang, Chapter 2, Sections



2.2 Assembly Language Program Structure
2.3 Assembler Directives
2.4 Software Development Issues
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Topics







Programming Languages
Assemblers, Compilers
Assembler Syntax
Directives
Addressing Modes in detail.
Software Development Issues
Examples
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Programming Languages
Programming is the

1.
2.
3.
Design
Coding
Debugging
of a sequence of instructions or algorithms
Three language types used to bridge the
CPU-human language gap:

1.
2.
3.
Machine Language
Assembly Language
High Level Languages i.e C, C++
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Computer Words
 The fundamental unit of information in a computer is
the ``Word”
 A Word is made up of several bits ‘10001100’ stored
in a specific location in memory.
 The word size of the 68HC11 controller is 8 bits
 The word size of the 68HC12 controller is 16 bits
 Words stored in a computer’s memory unit can
represent several types of information:
1. Binary numerical data
2. Coded data
3. Instruction code
4. Addresses that are part of an instruction.
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(1) Binary Data Words
These are words that simply represent a
numerical quantity in the binary system e.g.,
01110011 could represent temp (115)10
Signed data words


1.
2.
3.
Signed magnitude 0/1 000 1111
1’s complement
2’s complement
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(2) Coded Data Words
Data processed by a computer DO NOT have to be
pure binary numbers. e.g., BCD
In BCD each group of 4 bits represent a decimal
digit.
Many computers can perform arithmetic
operations on BCD-coded numbers as part of
their normal instruction repertoire.




Others (i.e., microcontrollers) require special effort on the
part of the programmer in order to do BCD arithmetic.
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Cont .. coded data words



Data words are not restricted to representing only
numbers!
Data words can be used to represent alphanumeric
codes (ASCII)
Address Location
Binary
HEX
012A
11001001
C9
012B
10111101
BD
012C
01010110
56
012D
10101111
AF
ASCII
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(3) Instruction Words
Memory
A program consists of a
sequence of binary coded
instructions that the CPU must
fetch from memory and then
decode and execute.
Typical Instruction
opcode
4-bit
Indicates the operation
(16 different operations)
Operand Address
16-bits
Address of location in memory where
Data (operand) will be taken from or
Stored (65,536 possible addresses)
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(4) Address Words
Assume that 0100 represents ADD operation
0100
0101101001110010
$4 (Opcode)
$5A72 (Address)
The instruction can be decoded to mean the following: Fetch
data word stored in address location 5A72, send it to the ALU,
add it to the ACC and keep the result in the ACC.
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Machine Language
Machine language: binary encoding of
instructions that are executed by a CPU


Ex: %10000110; %01011010
The machine language consists of CPU
opcodes and operands.

1.
2.
An opcode is one or more bytes that make up a
single machine instruction i.e. LDDA => $86
The operands are the “arguments” of the binary
instruction.
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Machine Language

Machine language
can directly control
the microcontroller’s
resources

Ex: LDAA #$5A
Code must be
stored in memory



$E000: $86
$E001: $5A
Fetch/Execute Cycle
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Programming Languages



The higher the level of the language, the
more abstract it is from the actual CPU
operation.
What is Source Code?
The term source is used to represent the
original programming code generated by the
programmer
What is Object Code?
The object code is the resulting code from the
software build process.
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Assembly Language
Assembly language: machine instructions are
represented into a mnemonic form


mnemonic form is then converted into actual
processor instructions and associated data
Ex:
LDAA #$5A
10000110
01011010
$86
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The Assembler


The computer program that performs the
assembly language to machine language
translation is called an assembler.
If the computer that runs the assembler is
not the same machine that will run the
machine code, it is called cross-assembler.

For embedded systems programming we
normally use a cross-assembler.
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Assembler Flow Diagram
Assembly Language
Cross Assembler
Program Listing
Machine Code
14 00008000 f60801
15 00008003 fb0800
16 00008006 7b0802
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ldab var2
addb var1
stab var3
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Assembly Language:

Disadvantages of Assembly Language!




require knowledge of the processor architecture
and instruction set
many instructions are required to achieve small
tasks
source programs tend to be large and difficult to
follow
programs are machine dependent => requiring
complete rewriting if the hardware is changed
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High Level Languages






Human like languages
Ex: Basic, Pascal, FORTRAN, Ada, Cobol, C, Java
C: most common high-level language for
microcontroller development.
Example: var3 = var1 + var2; (single line code!)
A compiler is required to translate the high level
language to machine code.
Two steps are required: High level language
translation into assembly code and then to machine
code.
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HLL Program Translation Process
High Level Code
Var3 = var1+var2;
Cross
Compiler
Assembly Code
Ldab var2
Addb var1
Cross
Assembler
Machine
Code
111101100
000100000
Stab var3
110110010
010101001
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Advantages of High Level Languages
1.
2.
3.
4.
It is CPU independent (so it is portable)
The program is shorter
The program is easier to read (Human friendly)
The source program is translated into machine
code for each type of CPU

What is different is the translator not the program
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Disadvantages of High Level Languages
1.
2.
There is no longer a one-to-one correspondence
between an instruction and the actual CPU
operation.
The compiler and not the programmer generates
the assembly code and therefore plays a large role
in the determining the actual CPU operation.

Because compilers are not as smart as programmers,
the machine code generated by a compiler is
typically larger and less efficient than the machine
code generated from assembly source.
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Examples
Coolant
Temperature
μ
controller
PROGRAM:
a. read input
b. subtract an offset
c. store the result
* Assembly language program
ORG $E000
LDAA $1031
SUBA #$20
STAA $D004
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Examples
The labels are assigned using assembler directives:
COOLANT_TEMP
CT_OFFSET
STORE_TEMP
EQU $1031
EQU $20
EQU $D004
LDAA COOLANT_TEMP
SUBA #CT_OFFSET
STAA STORE_TEMP
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Examples
Comment
Directive
* Listing 2.2
* Illustrate Listing 2.1 without labels and with fewer
* comments
ORG
$E000
;specify start address
;of program code
LDAA
$1031
SUBA
STAA
#$20
$D004
;load ACCA with contents
;of address $1031
;and subtract 32, hex 20
;store result in
;address $D004
*
*
*
* This sample is source code only.
* Corresponding machine code is not shown.
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Fetch/Execute
Operation of CPU
Clear Accumulator A
Load Accumulator A
CLRA
LDAA #$5C
E000: 4F
E001: 86 5C
CPU operations
Fetching CLRA
AR: address reg.
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Fetch/Execute
Operation of CPU
CPU operation
Executing the first
instruction CLRA
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Fetch/Execute
Operation of CPU
CPU Operation
Fetching the second
instruction opcode LDAA#
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Fetch/Execute
Operation of CPU
CPU operation
Fetching the second
instruction operand ($5C)
and executing the instruction
Note that PC increments
after each clock cycle
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Instruction
Set
References
Programming model
of the 68HC12
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Instruction Set References
The instruction set summary can give enough
information for using the assembly language
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Instruction Set References
dd = 8-bit direct address ($0000-$00FF)
(High byte assumed to be $00)
ff = 8-bit positive offset $00 (0) to $FF (256)
(Is added to the index)
hh = high order byte of 16-bit extended address
ii = one byte of immediate data
jj = high order byte of 16-bit immediate data
kk = low order byte of 16-bit immediate data
ll = low order byte of 16-bit extended address
mm = 8-bit bit mask (Set bits to be affected)
rr = signed relative offset $80(-128) to $7F(+128)
(Offset relative to the address following the
machine code offset byte
Instruction Set Summary.
Machine coding field, operand notations
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Assembler Syntax
1.
2.
First the assembler expects its input to be a text only
(ASCII) file (use a text editor to generate the file).
Source Line Syntax: Three possible types of lines in
a source file

Blank Lines: provide spacing for readability

Comment Lines: If a line begins with an * or ;
everything that follows in the line is a comment.
Comments may also be placed at the end of a
source line.

Source Lines: May contain a source code
instruction, a directive for the assembler, or a label.
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Assembler Syntax

Each source line must have the following format:
label:
operation, operand, operand ; comment
To separate the fields either space (s) or tab (s) are
used as white space.
1.
Label: is an identifier to mark a line in a program
(i.e. symbol that is defined in the first column).

The value of a label is set equal to the address of
the first byte defined on that line.

Labels are used as references for jump, call, and
branch instructions.
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Assembler Syntax (Label)
Example:
pulse:
bset PORTJ, %00000001
bset DDRJ, %00000001
……………
……………
bne pulse
swi
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Assembler Syntax (Operation)
2. Operation: The operation can be either


An Assembly Mnemonic (i.e. LDAA STAA)
An Assembler Directive (which is an instruction for
the assembler i.e. is not part of the instruction set of
the microcontroller, i.e. ORG, EQU, FDB).
Following the operation is the operand or operands
separated by commas.
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Assembler Syntax (Symbols)
2.


Symbols: are the names given to
equated constants and labels.
Different assemblers have different rules
governing legal symbols.
Things to watch out for include:
1. The maximum length of a symbol
2. Whether the assembler is case sensitive.
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Assembler Directives
Assembler directives are instructions directed
to the assembler, not the microcontroller.
Examples:


1.
2.
3.
4.
5.
6.
Origin, ORG
Equate, EQU
Form Constant, FCB
Form Double, FDB
Form Constant Character, FCC
Reserve Memory Byte, RMB
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Assembler Directives (ORG)



ORG: defines a starting address for the
assembler. It tells it where to place the
following code.
The syntax is: ORG abs_expr
i.e. ORG $0800
There should be a few org statement in
your program. For example one for the start
of the variables and another for the start of
the program.
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Assembler Directives (EQU)

EQU: Equates are used to set a symbol
equal to a value.
The syntax is symbol EQU abs_expr
Example: PORTJ EQU $29
 The assembler will replace every occurrence
of PORTJ with $29
 Equates are important for both code
readability and revisability.
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Assembler Directives (FCB)
FCB: Form Constant Byte

Is used to define one or more
bytes of constant storage

Syntax: symbol FCB expr

Example: MyConst FCB $10

Example:
NUM EQU 10
ORG $0100
TABLE FCB $10,17,NUM+6
Another term used frequently is
db (define byte)
dc.b (define constant byte)
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Contents Address
10
0100
11
10
0101
0102
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Assembler Directives (FDB)
FDB: Form Double Byte

Is used to define one or more
two-bytes of constant storage

Syntax: symbol FDB expr{,expr}

Example:
ORG $2000
LIST FDB $C13,$1000,LIST+$FF,50
Explain the contents of the Table?
Another term used frequently is
dw (define word)
dc.w (define constant word)
ENG3640 Fall 2012
Contents Address
0C
2000
13
10
00
2001
2002
2003
20
FF
00
2004
2005
2006
32
2007
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Multiple Byte Storage


Notice the order in which the
bytes are stored by the FDB
directive.
The most significant byte is
always stored in the lower
address location.

This is called big-endian storage.
ENG3640 Fall 2012
Contents Address
0C
2000
13
10
00
2001
2002
2003
20
FF
00
2004
2005
2006
32
2007
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Multiple Byte Storage


Intel-type processors use littleendian storage in which the
byte order is reversed.
If you were using a little-endian
processor, the constants would
be stored as follows:
ENG3640 Fall 2012
Contents Address
13
2000
0C
2001
00
2002
10
2003
FF
2004
20
2005
32
2006
00
2007
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Assembler Directives (FCC)
FCC: Form Constant Character

Is used to define one byte of
constant storage for each
ASCII character in a string.

Syntax: symbol FCC string

Example:
ORG $1000
STRING FCC /Hello/
Delimiting characters can be
backslash (/) or (‘) or (“)
ENG3640 Fall 2012
Contents Address
48
1000
65
1001
6C
1002
6C
1003
6F
1004
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Assembler Directives (RMB)
RMB: Reserve Memory Byte

Is used to reserve the number of bytes
indicated for a variable (IMPORTANT: it does
not assign data to the address)

Syntax: [symbol] RMB abs_expr

Example:
ORG $0000
RAM RMB 4
RAM will occupy mem loc 0000,0001,0002,0003
Another term used frequently is
ds (define storage)
ds.b (define storage bytes)
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Other Assembler Directives

ds, ds.b == rmb

ds.w == rmw (reserve memory word)

Fill (fill memory)


fill value, count
Example: Space_line fill $20, 40
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Addressing Modes



An addressing mode refers to the process
used by the CPU to determine the location of
an argument!
The location of the argument is called the
Effective Address (EA).
The CPU12 addressing modes are a superset
of the CPU11 addressing modes.

There are six addressing modes in common with
both the CPU11 and CPU12
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Addressing Modes
1.
2.
3.
4.
5.
6.
Inherent
Immediate
Direct
Extended
Relative
Indexed (8 different types)
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Addressing Modes
ADDA (opr)

1.
2.
3.
Operation: Add Memory to ACC A
Boolean Expression: A + M  A
Addressing modes





IMM (Immediate) Opcode: 8B (2 Bytes) (2 Cycles)
DIR (Direct)
Opcode: 9B (2 Bytes) (3 Cycles)
EXT (Extended) Opcode: BB (3 Bytes) (4 Cycles)
IND,X (Indexed) Opcode: AB (2 Bytes) (4 Cycles)
IND,Y (Indexed) Opcode: 18EB (3 Bytes) (5 Cycles)
S
X
H
I
N
Z
V
C
CCR
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Prebyte




Notice that ADDA,Y uses two bytes as
opcode!
Opcodes based on the earlier 6801
microcontroller had a single byte
New instructions + any instruction dealing with
index register Y have 2-byte opcodes
A few hex numbers were reserved for the first
opcode to specify that the following byte is also
part of the opcode
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Inherent Addressing Mode
Inherent addressing,
the opcode contains the
Effective Address, i.e. does
not require an operand.
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Inherent
Addressing
Mode
Operations
Initial condition
0→A
B+1 → B
Y → D, D → Y
Y-1 → Y
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Listing and Executing Conventions
* Listing
* Demonstrate inherent addressing mode
ORG
E000
E001
E002
E004
$E000
4F
5C
18 8F
18 09
;define start address
CLRA ;clears ACCA
INCB
;increment ACCB
XGDY ;swap ACCD with IY
DEY
;decrement IY
PC
ACCA
ACCB
IY
Operation
E000
E001
E002
E004
E006
6A
00
00
1A
1A
80
80
81
47
47
1A47
1A47
1A47
0081
0080
Initial cond.
0→A
B+1 → B
Y → D, D → Y
Y-1 → Y
ENG3640 Fall 2012
Listing
Program trace
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Immediate Addressing Mode
The argument itself follows
the opcode. EA = &opcode+1
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Immediate Addressing Mode
Forgetting to include the “#” is probably the most common mistake made
By CPU11 and CPU12 programmers, experienced and inexperienced!!
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Direct Addressing Mode



The least significant
byte of the effective
address of the
instruction appears in
the byte following the
opcode
The high-order byte of
the EA is assumed to be
$00
Direct page is defined
by the EA limits: $0000$00FF

Advantages:
1.
2.

ENG3640 Fall 2012
The execution time is
reduced by one cycle
The code size is reduced
by one byte.
With the 68HC12 not
too much advantage of
direct addressing since
most extended
instructions executed in
same clock cycles
except for brset, brclr.
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Direct Addressing Mode
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Extended/Direct Addressing Modes



Both extended and direct addressing are forms
of absolute addressing.
When using absolute addressing the effective
address follows the opcode.
The difference between extended and direct
addressing is the size of the effective address
operand.

In the extended addressing mode, the effective
address of the instruction appears explicitly in the
two bytes following the opcode
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Extended Addressing Modes
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Extended Addressing Modes

Accessing input/output ports



Each bit of an I/O port
corresponds to an external pin
of the I/O port
Two of 68HC12 ports are port
J and port H
The addresses of their
corresponding registers are
$0028 and $0024
ENG3640 Fall 2012
LDAA #$A5 ;load data to
output
STAA $0028 ;send it to
port J
LDAA $0024 ;read data
from port H
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Indexed Addressing Mode

Index registers X and Y are used for indexed
addressing.


Indexed addressing adds the value in an index
register to a constant or to the value in an
accumulator to form the effective address of the
operand.
Index registers X and Y can also serve as
temporary data storage locations with
some combinational capability.
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Indexed Addressing Mode

In the index addressing mode, either index register
X or Y is used in calculating the effective
address

Effective address is variable and depends on the
1.
2.
content of index registers X or Y and
a fixed, 8-bit, unsigned offset contained in the instruction
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Indexed
Addressing
Mode
To use the
index
addressing
mode to
access onchip
registers, it is
best to
initialize the
index
register to the
starting
address of the
register block
and use
an 8-bit offset
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Indexed Addressing Mode
* Listing
* Demonstrate indexed addressing mode
* for data transfer application
ORG $E000 ;start address
*
*
*
LDAA $00,X ;load with indexed mode
ADDA $01,X ;add with indexed mode
STAA $20,Y ;store with indexed mode
ABY
;an inherent mode
;instruction to modify IY
INY
;another one which
;increments IY
STAA $30,Y ;again, store using
;indexed mode
BRA
*
;stop program
ENG3640 Fall 2012
OPERATIONS
(X+0) → A
A+(X+1) → A
A → (Y+20)
B+Y → Y
Y+1 → Y
A → (Y+30)
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CPU12 Indexed Addressing Mode

In the CPU12 there are seven different
classes of indexed addressing.
1.
2.
3.
4.
5.
6.
7.
5-bit Constant Offset Indexing
9-bit Constant Offset Indexing
16-bit Constant Offset Indexing
16-bit Constant Indirect Indexing
Auto-Increment and Auto-Decrement Indexing
Accumulator Offset Indexing
Accumulator D Indirect Indexing
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Auto-Increment/Decrement Indexing



Useful to have when a pointer progresses through
an array of data objects during a program loop.
When using auto-increment/decrement
addressing, there can be no offset.
Modes:
1.
2.
3.
4.
Operation n,+r ; pre-increment by n
Operation n,r+ ; post-increment by n
Operation n,-r ; pre-decrement by n
Operation n,r- ; post-decrement by n
where n = the adjustment value 1< n < 8
r = the indexing register (IX, IY, SP)
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Auto-Increment/Decrement Indexing
Example

STAA 1,-X



Stores the contents of accumulator A at the memory location with the
address equal to the value of ``IX” minus 1.
IF X = 1000, then IX = 0FFF, and A will be stored in memloc=0FFF
LDX 2,SP+


Loads the contents of the memory location pointed to by the stack
pointer SP.
IF SP = 1000, then IX will be loaded from memloc=1000 and then
SP=1002
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Register Offset Indexed Addressing


Register offset indexed addressing allows a
variable offset value to be added to the indexing
register without changing the value of the indexing
register.
The effective address is calculated by:


[offset register] + [indexing register]
Modes:
1.
2.
3.
Operation A, r
; Acc “A” Contains offset
Operation B, r
; Acc “B” Contains offset
Operation D, r
; Acc “D” Contains offset
where r = the indexing register (IX, IY, SP, PC)
Example: staa B,X
; m[ [B] + [X] ]  [A]
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Register Offset Indexed Addressing:
(An Example)

Write a program that looks up a display
code in SEG_TBL for the variable DISP_Var
and then outputs the result to DISP_REG

Opcode
cd1000
b60835
a6ec
7a2000
Instruction
ldy #SEG_TBL
ldaa DISP_VAR
ldaa a,y
staa DISP_REG
Description
; SEG_TBL  IY
; (DISP_VAR)  ACCA
; (IY+ACCA)  ACCA
; ACCA  DISP_REG
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Indexed Indirect Addressing



The effective address in indirect addressing is
contained in the location pointed to by the sum of
the indexing register and an offset!
Index Register + Offset = address of pointer.
In other words the sum of the index register and the
offset point to a pointer that points to the argument!!
Modes:
1.
2.
Operation [D,r]
Operation [n,r]
where
where
; ACCD Contains offset
; n is a 16-bit constant offset
D = register containing the offset
r = the indexing register (IX, IY, SP, PC)
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Indexed Indirect Addressing
* Equates
JMPTBL
CMD10FF
equ $1000
equ 2
opcodes
ce1000
Instruction
ldx #JMPTBL
Description
;JMPTBL  IX
15e30002
jsr [CMD10ff,x]
;((CMD10FF +IX))  PC
15e7
jsr [D,X]
;((D+IX))  PC




Line#1, IX Points to a table that contains the starting address for
a set of command routines (an array of pointers to functions)
Line#2, A 16-bit constant offset, CMD10FF, is used to point to the
correct pointer
Line#3, uses ACCD for a variable offset into the Jump Table.
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Indexed Indirect Addressing
CMD10FF($02)
IX
PC
1000
+
8000
20
1002
00
1003
80
2000
2001
00
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Relative Addressing Mode

Relative addressing mode is used only for
branch instructions


Usually the branch instructions generate two
machine-code bytes: one for opcode and one for
the relative offset
The offset byte is signed twos-complement
with a range for -128 to +127
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Relative Addressing Mode



When using relative addressing, the effective
address is calculated by adding an offset, rr,
to the current value of program counter, PC.
The offset can be calculated as following
rr = AD – PC , Where AD = Destination address
and PC = contents of Program Counter.
Normally, we do not have to perform this
calculation. We simply provide a label for the
branch destination, and the assembler
calculates the offset for us!
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Relative Addressing Mode

Address Opcode
00000834 20fe
00000836






Label Instruction
trap bra trap
Description
; PC-2  PC
This is an example of an endless trap using relative branch (i.e.
one way to stop a program).
Here we want to branch to the beginning of the same line.
We use the label trap as the argument for the branch instruction.
The label trap is set equal to the address $0834.
The assembler calculated the relative offset as follows:
rr = AD – PC = $0834 – 0836 = -2 = $FE
The offset is -2 which means the program counter jumps back two
bytes.
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Relative Addressing Mode
Assembly language statements
Examples of relative addressing mode
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Assembly Language
Text Editor
Assembly
Source Code
Assembler
Relocatable
Object Format
Assembly
Language
Development
System
Linker
Hex Code
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Assembly Language

Why do we need a linker?



Line assemblers


one writes the source code in smaller sections
the linker helps to develop large applications
translate source code directly into machine code
Disassembler

translating program that reverses the machine code
into the assembly source code
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Manual Assembly
Use the manual of the instruction set summary of the
processor to convert source code into hex code
address
LDAA 1031
SUBA #20
STAA D004
E000: B6 10 31
E003: 80 20
E005: B7 D0 04
By convention machine code is always hex
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C Language for Microcontrollers

High level languages



compiled languages
interpreted
Write the C source code
Why C is popular?


Design Program
combines the best of
both, the high-level
language and the
assembly language
has features to allow
direct control of I/O which
is very important for
microcontroller
applications
ENG3640 Fall 2012
Compile the program
to produce object code
Link the object code
C Library
81
C Language for Microcontrollers
/* C Listing 2.1 */
/* Declarations */
unsigned char StoreTemp, CoolantTemp;
#define CT_OFFSET 0x20
void main(void)
{
/*Main body of code */
StoreTemp = CoolantTemp - CT_OFFSET
}
ENG3640 Fall 2012
ladab _CoolantTemp
clra
subd #32
stab _StoreTemp
Use a cross compiler that
runs on a PC to target a
particular microcontroller
68HC12
82
Assembler Syntax (Number Syntax)

Number Syntax: Assemblers designed for Motorola
processors use the following format to determine the base
of a number
[radix]n where the radixes are
Radix
$
Type
Hexadecimal
@
Octal
%
Binary
&
Decimal
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Indexed Addressing Mode


In the index addressing
mode, either index
register X or Y is used in
calculating the effective
address
EA is variable and
depends on the content
of index registers X or Y
and a fixed, 8-bit,
unsigned offset
contained in the
instruction


ENG3640 Fall 2012
Dynamic single-byte
offsets are facilitated by
the use of the add
accumulator B to index
register X (ABX) instr.
More complex address
calculations can be
obtained by the use of
instructions XGDX and
XGDY
84
Indexed Addressing Mode
/* C Listing 2.8 */
The principle of
using index registers
is similar to using
pointers in C
Index addressing is
like computing a
pointer value and
fetching its content
y=*(ptr + n)
/* Declare direct variables */
unsigned char VarA, VarB;
/* Declare pointer variables */
unsigned char *PtrX, *PtrY;
void main(void)
{
/*Main body of code */
VarA = *PtrX + *(PtrX+1);
*(PtrY+0x20) = VarA;
PtrY = PtrY + VarB;
++PtrY;
*(PtrY+0x30) = VarA;
}
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Indexed Addressing Mode
* Listing 2.9
* Demonstrate using IA
* for a table look-up application
ORG
$E000
LDAB $30
;get stored differential
;pressure signal
LDX
#$B600
;point to square root table
ABX
;look up its square root
LDAA $00,X
;and load it to find flow rate
F=K√(h)
/* C Listing 2.9 */
/* Declare a byte variable */
unsigned char Flow, DiffPress;
/* Declare an array of bytes */
unsigned char Table[0x100];
void main(void)
{
/*Do look up */
Flow = Table[DiffPress];
/* Note that Table[0], Table[1],
Table[2] up toTable [0xff]
would normally be pre-assigned */
}
Microcontroller reads a signal from a sensor and
stores it in address $30
It has a block of memory starting at $B600, which contains
the square root of all single-byte numbers
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Indexed
Addressing
Mode
Table[0x00]
Table[0x01]
Table[0x02]
Table[0x03]
0x00
0x10
0x17
0x1C
Table[0xd0]
0xed
Table[0xfe]
Table[0xff]
0xff
0xff
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Constant Offset Indexing


The effective address is calculated by
adding the contents of an index register to
a constant offset.
Syntax
Operation ,r
;No offset
2. Operation 0,r
;No offset
3. Operation n,r
;Positive Constant Offset, n
4. Operation –n,r ;Negative Constant Offset, -n
Where r = index register (IX, IY, SP, PC)
n(-n) = signed constant (5-bit, 9-bit, 16-bit)
1.
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Auto-Increment/Decrement Indexing
Example

Write a program to copy a 16 bit word from an
array of 4-byte data object to an array of 2-byte
data object.

Assume IX is initialized to point to the source array, and IY
points to destination.

OPCODE
18023371
Instruction
Description
movw 4,x+,2,y+ ;(IX:IX+1) -> (IY:IY+1), IX+4->IX, IY+2->IY
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