Lecture 14 PicoBlaze Overview ECE 448 – FPGA and ASIC Design with VHDL.
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Transcript Lecture 14 PicoBlaze Overview ECE 448 – FPGA and ASIC Design with VHDL.
Lecture 14
PicoBlaze Overview
ECE 448 – FPGA and ASIC Design with VHDL
Required reading
• P. Chu, FPGA Prototyping by VHDL Examples
Chapter 14, PicoBlaze Overview
Recommended reading
• K. Chapman, PicoBlaze for Spartan-6, Virtex-6, and
7-Series (KCPSM6)
ECE 448 – FPGA and ASIC Design with VHDL
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Block diagram of a Single-Purpose Processor
(FSMD – Finite State Machine with Datapath)
ctrl
ECE 448 – FPGA and ASIC Design with VHDL
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Block diagram of a General-Purpose Processor
(Microcontroller)
ECE 448 – FPGA and ASIC Design with VHDL
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PicoBlaze-3
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PicoBlaze-3 Overview
PicoBlaze-6 Overview
PicoBlaze-6 Overview
Size of PicoBlaze-6 in Spartan 6
Make an educated guess
1. Resource Utilization in CLB Slices
?
2. Number of PicoBlaze-6 cores fitting inside of the Spartan-6
FPGA (XC6SLX16) used on the Nexys3 FPGA board
?
Size of PicoBlaze-6 in Spartan 6
1. Resource Utilization in CLB Slices
• 26 CLB Slices
• 1.1% of Spartan-6 used in Nexys3
2. Number of PicoBlaze-6 cores fitting inside of the Spartan-6
FPGA (XC6SLX16) used in the Nexys3 FPGA board
• 87 PicoBlaze cores
Speed of PicoBlaze-6 in Spartan 6
Make an educated guess
1. Maximum Clock Frequency
?
2. Maximum number of instructions per second
?
Speed of PicoBlaze-6 in Spartan 6
1. Maximum Clock Frequency
• 105 MHz
2. Maximum number of instructions per second
•
52.5 millions of instructions per second (MIPS)
Register File of PicoBlaze-3
8-bit
Address
0
1
2
3
4
5
6
7
F
7
7
7
7
7
7
7
7
7
s0
s1
s2
s3
s4
s5
s6
s7
sF
0
0
0
0
0
0
0
0
0
16 Registers
Register File of PicoBlaze-6
• Instructions
REGBANK A
REGBANK B
used to switch between banks
• Only one set of flags
Z, C, I
• Very useful for
interrupt service routines
Definition of Flags
Flags are set or reset after ALU operations
Zero flag - Z
Z=1
0
zero condition
if result = 0
otherwise
Carry flag - C
overflow, underflow, or various conditions
Example*
C=1
if
result > 28-1 (for addition) or
result < 0 (for subtraction)
0
otherwise
*Applies only to addition or subtraction related instructions,
refer to the following slides otherwise
Interface of PicoBlaze-3
KCPSM = constant (K) coded programmable state machine
ECE 448 – FPGA and ASIC Design with VHDL
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Interface of PicoBlaze-3
Name
Direction
Size
Function
clk
input
1 System clock signal.
reset
input
1 Reset signal.
address
output
10 Address of the instruction memory.
Specifies address of the instruction to be
retrieved.
instruction
input
18 Fetched instruction.
port_id
output
8 Address of the input or output port.
in_port
input
8 Input data from I/O peripherals.
read_strobe
output
1 Strobe associated with the input
operation.
out_port
output
8 Output data to I/O peripherals.
write_strobe
output
1 Strobe associated with the output
operation.
interrupt
input
1 Interrupt request from I/O peripherals.
interrupt_ack
output
1 Interrupt acknowledgment to I/O
peripherals
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Interface of PicoBlaze-6
Name
Direction
Size
Function
clk
input
1 System clock signal.
reset
input
1 Reset signal.
address
output
12 Address of the instruction memory.
Specifies address of the instruction to be
retrieved.
instruction
input
18 Fetched instruction.
port_id
output
8 Address of the input or output port.
in_port
input
8 Input data from I/O peripherals.
read_strobe
output
1 Strobe associated with the input
operation.
out_port
output
8 Output data to I/O peripherals.
write_strobe
output
1 Strobe associated with the output
operation.
interrupt
input
1 Interrupt request from I/O peripherals.
interrupt_ack
output
1 Interrupt acknowledgment to I/O
peripherals
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Interface of PicoBlaze-6
ECE 448 – FPGA and ASIC Design with VHDL
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Additional Ports of PicoBlaze-6
Name
Direction
Size
Function
bram_enable
output
1 Read enable for the program memory. This
signal should be connected to the enable
input of the program memory and is used to
reduce the power consumption associated
with the BRAM(s).
k_write_strobe
output
1 This output will pulse High for one clock cycle
when KCPSM6 executes an ‘OUTPUTK’
instruction and the peripheral logic should
capture the data provided on ‘out_port’ into
the intended destination defined by the value
of ‘port_id[3:0]’. Note that only the lower 4-bits
of ‘port_id’ are used during ‘OUTPUTK’.
sleep
input
1 Active High sleep control. When driven High
KCPSM6 will complete the current instruction
and then enter a sleep mode in which all
activity stops. Whilst in the sleep mode all
strobes are inactive and the ‘bram_enable’ is
Low to disable the program memory resulting
in minimum power consumption. All inputs
except ‘reset’ are ignored. When ‘sleep’ is
returned Low, KCPSM6 resumes execution
ECE 448 – FPGA and ASIC Design with
VHDL
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from
the point that it stopped.
Generics of PicoBlaze-6
Name
Default
Range
Function
hwbuild
X”00”
X”00”..X”FF”
can be used to define any 8-bit value in
the range ‘00’ to ‘FF’. It is then possible
to load any KCPSM6 register with this
value using the ‘HWBUILD sX’ instruction
interrupt vector
“X3FF”
X”00”..X”FFF”
When an interrupt occurs (and interrupts
are enabled) then KCPSM6 inserts and
executes a special form of CALL
instruction to a fixed address known as
the interrupt vector. By default
this address is ‘3FF’ (the last location of a
1K program memory).
scratch_pad_
memory_size
64
64, 128, 256
Size of the scratch pad memory.
Increasing the default size to 128 (256)
bytes, increases the resource utilization
by 2 slices (6 slices).
ECE 448 – FPGA and ASIC Design with VHDL
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PicoBlaze-6 Instantiation
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Development
Flow of a
System
with PicoBlaze
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PicoBlaze-3 Programming Model
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PicoBlaze-6 Programming Model
Bank A
Bank B
FFC
FFD
FFE
FFF
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Syntax and Terminology
Syntax
Example
Definition
sX
s7
Value at register 7
KK
ab
Value ab (in hex)
PORT(KK)
PORT(2)
PORT((sX))
PORT((sa))
RAM(KK)
RAM(4)
Input value from port 2
Input value from port specified by register a
Value from RAM location 4
Addressing modes
Immediate mode
SUB
s7, 07
ADDCY s2, 08
s7 – 07
s7
s2 + 08 + C s2
Direct mode
ADD
sa, sf
INPUT s5, 2a
sa + sf sa
PORT(2a) s5
Indirect mode
STORE s3, (sa)
s3 RAM((sa))
INPUT s9, (s2)
PORT((s2)) s9
PicoBlaze ALU Instruction Set Summary (1)
PicoBlaze ALU Instruction Set Summary (2)
PicoBlaze ALU Instruction Set Summary (3)